The Engineering Projects

Hello,

I am currently designing a LVDS standard interface to drive a Virtex-6 FPGA with 1.25Gbps (DDR) and I would like to know if the corresponding values for the input capacitance of the LVDS-pins in the data-sheet or IBIS-file are valid? With a normal LVDS interface (I=3.5 mA and Rd=100 Ohm) it is to my mind not possible to drive 6-8pF single-ended input capacitance at 1.25Gbps. What do I misunderstand, because the data-sheet says that it is possible to drive the Virtex-6 at 1.25Gbps with a standard LVDS driver? Are the values right?

I´m grateful for any help regarding this topic.....

JLCPCB – Prototype 10 PCBs for $2 (For Any Color)
China’s Largest PCB Prototype Enterprise, 600,000+ Customers & 10,000+ Online Orders Daily
How to Get PCB Cash Coupon from JLCPCB: https://bit.ly/2GMCH9w