FPGa Projects

Doubt regarding using ODIN II tool for converting a verilog file into BLIF format

I am an M.tech student and have been working on a project related to FPGA architecture research.In this, among other things i am supposed to convert verilog files into BLIF format as a part of technology mapping.While some files are getting neatly converted,some files do not.I dont understand why. B'cuz the files which are not getting converted too are functionally correct and do get compiled in MODELSIM. Please get back to me on this as its really urgent.


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Syed Zain Nasir

I am Syed Zain Nasir, the founder of <a href=https://www.TheEngineeringProjects.com/>The Engineering Projects</a> (TEP). I am a programmer since 2009 before that I just search things, make small projects and now I am sharing my knowledge through this platform.I also work as a freelancer and did many projects related to programming and electrical circuitry. <a href=https://plus.google.com/+SyedZainNasir/>My Google Profile+</a>

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Syed Zain Nasir
2 days ago