Introduction to JK Flip Flop
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Introduction to JK Flip Flop. It is a flip-flop, also known as a latch circuit, that can be either active-high or active-low based on the signal applied. It is an improved version of the SR Flip Flop and prevents the circuit from going in an
invalid state. As the name suggests, it helps the circuit toggle between two states.
- The JK flip-flop is named after his inventor known as Jack Kilby from Texas Instruments. The JK Flip-flop is also widely known as a programmable flip-flop as it can disguise other flip-flops based on the inputs applied.
There is a slight difference between Flip-flop and latch. Don't you worry, we will figure it out later in this post. Rest assured, both are nothing but a data storage element mainly used in communications, decoders, multiplexers, and registers.
In this post, I'll cover each and everything related to JK Flip Flop, so you don't have to wrestle your mind surfing the whole internet and find all the information in one place. Let's jump right in.
Introduction to JK Flip Flop
JK Flip Flop is a universal flip-flop that makes the circuit toggle between two states and is widely used in shift registers, counters, PWM and computer applications.
Before we nail down the details of JK Flip Flop, we must know what is Flip Flop.
- Flip Flop comes with two stable states and is mainly used to store the state information of any circuit. The output of the flip-flop is directly related to the input applied. When you modify any of the applied input, it directly influences the output state of the device.
In engineering circuits, most of the devices need to store information using Set or Reset, HIGH or LOW which ultimately written in the form of zeros and ones.
- We use language to collaborate with each other, similarly, electronic devices need some language pattern to collaborate with other electronic devices. They understand a language in terms of ones and zeros where former represents the HIGH state and later represent the LOW state of the circuit.
The circuits that come with a toggling nature whose outputs depend on the present input and the sequence of past input values are known as Sequential Logic Circuits.
JK Flip Flop Symbol and Logic Table
Following figure shows the symbol of Flip-Flop circuit.
The clock signal and input are closely related to each other. When the clock signal is active LOW, the input signal won't be affecting the output state. The input will only get active when the clock is active HIGH which serves as a control signal of the circuit. Based on the applied inputs, the output will be generating two stable states.
- The J and K are the inputs and Q is the output state of the flip-flop where Q' represents the inverted output state. In the presence of the clock signal, the output changes its state based on the applied inputs, producing a toggling function when both inputs are HIGH.
Following figure shows the logic table of the JK Flip Flop.
When both inputs are active HIGH, the output starts toggling between the two states. This is the reason JK Flip Flop is widely considered as an astable device.
Difference between SR and JK Flip Flop
Two flip-flops are known as JK Flip and SR Flip are widely used in electronic applications. Using the SR flip-flop when both inputs are high, will generate an invalid condition. On the other hand, JK Flip Flop extensively removes the invalid condition, when both inputs are kept HIGH, by toggling the output alternatively between two states.
- The JK Flip Flop is nothing but an improvised version of SR Flip Flop, where an undefined condition is avoided that may create a gross impact using the SR Flip Flop.
Following figure shows the logic table of SR Flip Flop.
You can see, when both inputs are 1, the circuit goes to the invalid state.
Note: The SR flip-flop is also known as a 1-bit memory, as it comes with an ability to store the input pulse even after it has been passed.
Difference between Flip Flop and Latch
The basic difference between a latch and a flip-flop is a
clocking process. The latch
is asynchronous where outputs are drastically influenced by the slight change in inputs.
- A flip-flop is synchronous and edge-triggered that changes its state based on the control signal (clock signal) as it goes from HIGH to LOW and LOW to HIGH conditions.
In SR Flip Flop, the output Q would be high as you set S active HIGH and eventually Q’ will be low, producing the asynchronous result. On the other hand, SR latch is synchronous where output changes as you give an active clock signal.
- In other words, we can conclude, both latches and flip-flops are circuit element where the output depends on both: the current input and previous input. The flip-flop has a clock signal while the latch is deprived of it.
The Latch is mainly divided into two types
Active High Latch
Active Low Latch
In an Active-high latch, the inputs are connected to ground, activating the latch by applying the HIGH signal on either of the inputs. If the SET input goes HIGH, it will keep the output HIGH even after the SET input goes LOW. The output will go LOW only when the RESET input turns HIGH.
And in an Active-low latch, the inputs are kept HIGH, activating the latch by applying the LOW signal on either input. When the SET input turns LOW, the output will go HIGH. The output remains in HIGH condition until the RESET pin goes LOW.
Applications
JK Flip Flops is widely used in electronic circuits with the main aim to store the state information of the device. Following are the major applications it can be used for.
- Shift Registers
- Data storage
- Data transfer
- Counters
- Frequency Dividers
- Bounce elimination switch
- Storage Registers
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