JK Flip Flop Circuit Diagram in Proteus

Hello Learner! I hope you are doing great. Welcome to another tutorial at The Engineering Projects. This blog is the part of series we have stated about the Digital Logic Circuits. Previous to this, we learned Implementation of SK Flip Flops in Proteus. at the present day, we'll seek the knowledge about the following points:
  1. What are Flip Flops?
  2. What are JK Flip Flops?
  3. How can we record the Truth Table of JK Flip Flops?
  4. What is the Procedure to Construct the circuit of JK Flip Flop through Logic Gates and IC circuit?
Moreover, we'll also have some useful bits of Information in Did you know Sections. Let' see the explanation of the concepts given above.

Flip Flops

The Flip Flops are the building blocks of many of  the Electronic Circuits. We define the Flip Flops as:
"The Flip Flops are the type of sequential Logic Circuits that are mainly made through the Logic Circuits and have the ability to receive, store, and show the output in the form of binary bits i.e, 1 and 0."
There are mainly four types of Flip Flops:
  1. SR Flip Flops
  2. JK Flip Flops
  3. D Flip Flops
  4. T Flip Flops
The main focus of this blog is JK Flip Flop so we'll discuss them in detail.

JK Flip Flops

JK flip Flops are the sequential Circuits and are the very much similar to SR Flip Flops. We introduce the JK Flip Flips as:
"The JK Flip Flops are the Universal Flip Flops containing two inputs, two outputs and a Clock in the Circuit. They have e the ability to avoid the invalid or Illegal condition of the Flip Flops."
The name of the inputs are said to be J and K respectively. Unlike SR Flip Flops ( where S stands for Set and R stands for Reset) the inputs of JK Flip Flops are titled autonomously. Somehow, related to the inventor of the JK Flip Flop "Jack Kilby".

DID YO KNOW???????????

JK Flip Flops are useful in many ways as: They have Low power dissipation. They are much Faster than their sibling Flip Flops.
]The output of the JK Flip Flops are named as Q and Q'. As the name implies , both the Outputs are opposite to each other. When Q is HIGH , the Q' is Low and same is the case with the opposite condition. The Truth Table Of JK Flip Flop is given next:
CLOCK J K Q Q’
High 0 0 Unchanged Unchanged
Low Unchanged Unchanged
High 0 1 0 1
Low 0 1
High 1 0 1 0
Low 1 0
Low 1 1 1 0
High 0 1
There are two types of JK Flip Flop named as:
  1. Basic JK Flip Flop.
  2. Master-Slave JK Flip Flop.
Yet in this lesson, we'll make a clear idea about the Basic JK Flip Flop only. For best concepts, we'll not just observe the Circuit diagram of JK Flip Flop but we'll Construct a Circuit using different tools and Components in Proteus ISIS. We'll learn about the Formation of JK Flip Flop in two ways:
  1. JK Flip Flop through Logic Gates.
  2. JK Flip Flops through IC.
Rush toward your Proteus Software and learn how can you make this in just simple steps.

DID YOU KNOW????????????

The JK Flip Flops are the better version of SR Flip Flops and are better than those just using a NOR Gate.

JK Flip Flop Circuit Diagram in Proteus

  • Start your Proteus Software.
  • Get the following material from the Pick Library through "P" button..

Material Required

  1. 3 input NAND Gate.
  2. 2input NAND Gate.
  3. Logic Toggle.
  4. LED-RED.
  5. Ground Terminal.
  6. Connecting Wires.
  • Get the first three elements from the Pick Library one by one.
  • Select two 3 input NAND Gates and arrange them vertically at the working area one after the other.
  • Repeat the same step for Two input NAND Gates just after the two gates set before.
  • Get two Logic Toggles and arrange them just before the Gate 1 and 2.
  • Take two LEDs and place them just after switch 3 and 4.
  • Get a Clock and set it in between two logic Toggles.
  • JK Flip Flop Circuit Diagram in Proteus is shown in image given below:
  • Pop the Play button to start simulation.
  • Change the values of the inputs and observe the output at each gate. You will get the following table:
CLOCK J K 1 2 Q Q’
High 0 0 Unchanged Unchanged Unchanged Unchanged
Low Unchanged Unchanged Unchanged Unchanged
High 0 1 1 1 0 1
Low 1 1 0 1
High 1 0 1 1 1 0
Low 1 1 1 0
Low 1 1 1 1 1 0
High 1 1 0 1
Hence this is the required output.

JK Flip Flop IC (Integrated Circuit)

Due to the usability of JK Flip Flop, Proteus ISIS has added many JK Flip Flop IC. In this way, we do not need to design all the circuit. Instead we can simple using JK Flip Flop IC.Let's see how it will work:

Material Required

  1. JK Flip Flop ( IC)
  2. Logic Toggle
  3. LED-red
  4. Ground Terminal
  • Place the JK Flip Flop IC at the working area.
  • Connect Logic Toggles and clock at the respective ports.
  • Add the Led at Q and Q' ports.
  • Ground the LED's through Ground Terminals.
  • Change the values of the Logic Toggles again and again and check that does you get the required output or not.

Easily available JK Flip Flop IC

Proteus also contain many other ICs of JK Flip Flop. Some of them are as follows:
  1. 74LS107 that contain a Dual JK Flip Flop with CLEAR.
  2. 4027B is an IC that is Dual JK Flip Flop.
  3. 74LS73 contains Dual JK Flip Flop with CLEAR.
  4. 74LS76 has Dual Flip Flop with PRESENT and CLEAR.
Truss, Today we recalled that what are the Flip Flops, what are its types, learned a great information about JK Flip Flops and designed its circuit in Proteus ISIS in two ways. Hopefully, you got the required pieces of particulars. in the next Lesson, we'll talk about the Master slave JK Flip Flops.

4 Tips for Better Construction Job Bids

Hello Buddies, Welcome from the team of The Engineering Projects. We hope you are having a good day. In this article, you will investigate about four remarkable tips for a better job bit that will boost your chances to be hired. Construction is an emerging and fast-growing source of business. However, we cannot neglect that it is a very competitive field at the same time. In this ever-growing world, where the construction business is highly profitable and demanding, most people fail to get better construction jobs due to inaccurate bids. While construction bidding is not an easy task, better understanding and farsightedness can help you win more jobs.

What is construction bidding?

Construction bidding is the process through which you submit a proposal for a specific job. In other words, you send your proposal to a potential client. As simple as it may seem, writing an attractive proposal isn’t easy. Many companies have very unfavorable bid-hit ratios, which translates into wasted time and money. However, this process doesn’t depend entirely on luck. Understanding the process and working diligently can make your construction bidding more manageable and successful. When a client invites contractors to bid on a project, they often split it into different chunks. For example, one chunk of the job might be plumbing and another electrical work. Then, the client will invite various subcontractors to bid on tasks related to their specialties. This process is very smooth as it allows the owners and contractors to develop better relationships and continue their work. Similarly, it also helps the owners to get the best team of contractors for their construction project.

Tips for Submitting Better Construction Job Bids

Preparing a bid proposal for construction jobs takes a lot of time and effort. It requires full focus on understanding the client’s needs, estimating the costs for laborers and equipment, and then bidding. Even the smallest of mistakes can make you lose a highly profitable project opportunity. The following tips will help you in writing the best construction job bids.

?       Select the right project

Many people think that bidding on every job they encounter will increase their chances of getting work. However, that’s not the case. It will only utilize your energy and time with no fair results. Thus, bidding on every job you find is among the worst mistakes construction contractors make. A much more effective strategy is to bid less and bid on those jobs worth your consideration and time. Let’s assume you bid on a particular project without thinking and attend all pre-bid meetings and start taking subcontractor pricing. After analyzing the pricing and crunching the numbers, you realize that it doesn’t offer much profit to your team. So, the only solution at this point is to move on to another project. But what did all the effort, pre-bid meetings, and takeoffs cost you? It was a tremendous waste of time and resources. It can improperly impact your overall profitability as a company. Therefore, the best strategy is to identify the client’s needs and bid on those projects you can perform and give the best results. Before bidding, think about the past projects your company had won and delivered and came out with successful results. If the new projects are similar, bid on them.

?       Develop a positive reputation

General contractors always gauge your effort and professionalism based on the proposals you submit. An attractive proposal highlighting your ability to meet the client’s needs can help you win the job for the bid amount quickly. A good bid proposal is detailed. Take the time to carefully craft your messaging and offer within the proposal before submitting it. To be more precise, the proposal should be professional, comprehensive and accurate. To know more about writing a winning bid proposal for construction, head to bridgitsolutions.com. The company is highly reputable and has put together a great resource about crafting effective construction bids.  

?       Know when to submit the lowest bid

If a brand has no real competitive advantage over others, its chance of winning the bids becomes difficult. The same happens when you are new to the area and are surrounded by highly reputed and competitive companies. If you’ve nonetheless identified the project as one that will further your company’s goals, you may consider placing a relatively low bid. This strategy can help a lot as it attracts more contractors to get the work done at the lowest price. However, it should not be so low that you lose your profit – unless you’re willing to treat the project as a loss leader. However, some contractors value your skills and expertise more than the price. If you have a team of highly skilled professionals capable of managing the client’s needs, that constitutes a competitive edge they’ll likely consider when choosing a contractor.

?       Create accurate estimates

Taking accurate measurements is essential when calculating the appropriate bid. Inaccurate measurements and human errors can cause many problems as it misrepresents the total amount of labor and materials, which can have a devastating impact on your bottom line. The best way to create accurate estimates is by using good estimating software. An efficient software solution can speed up the process and provide error-free, precise, and accurate bids. Similarly, arithmetic errors leave a huge impact on the bid. So, using a calculator is better to ensure better measurements. However, robust construction bid software is the best way to ensure accurate measurements in less time. Choosing the best estimating software is also difficult when there are so many in the market. First of all, understand your needs and what you want the software to do for you. Then, do proper research and choose the best software solution for your goals.

Conclusion:

Preparing a competitive and winning proposal for a construction job requires time and effort. However, no matter how much time you put in, if you don’t have a proper proposal with accurate estimates, your efforts will go in vain. Thus, the tips mentioned above will help you understand the strategies of construction bidding and bidding for the right and winning proposal.

Implementation of SR Flip Flops in Proteus

Hello Learners! welcome from the team of The Engineering Projects. We hope you are having a productive day. We are working on a series of Blogs based upon the core knowledge about Digital Logic Gates and Circuits. In this tutorial, we'll know about the SR Flip Flops and after brief introduction we will simulate SR Flip Flops in Proteus. Let's have a glimpse on the topics of today:
  • What are Flip Flops?
  • What are the types of Flip Flop?
  • How does we design the Truth Table of SR Flip Flops?
  • What are further classes of SR Flip Flips?
  • Implementation of SR Flip Flops in Proteus.

Flip Flops

Flip Flops are extremely important Circuits of Digital Logic Design. We Introduce the Flip Flops as:
"Flip Flops are type of sequential Logic Circuit that contain two stable states "Zero" and "One" (because of the binary system). It is often used as Storage device and each state of Flip Flop stores one bit." 
They are the building blocks of the Electronics and play an important role in the world of Logic Circuits. Being the Binary circuits, they are essential for the computation in the computer system. The Inputs of the Flip Flops are named as "S" AND "R" that stands for Set and Reset respectively. There are two Outputs of the Flip Flop called Q and Q'. As the name suggest itself, both the outputs are the Inverse of Each Other. the Flips Flop are sequential Logic Circuits that mean they use a Clock called as "CLK"  in the circuit. the Function of clock is to synchronize the circuit. The Phenomenon in which the clock signal is change its value i.e, from 0 to 1 or from 1 to 0, is called the edge of the clock.

DID YOU KNOW?????????????????

Flip Flops are also called as Bipolar Multi-vibrator because they can store the both the Conditions of the Binary system.
When we say that Flip Flops are the Storage Devices, we mean that they does not only calculate the output from the present data, but they can also work with the data stored previously in the Flip Flops.  

Types of Flips Flops

When we talk about the types of Flip Flops, we consider mainly Four types of Flip Flops as follow:
  1. SR Flip Flop
  2. JK Flip Flop
  3. D Flop Flops
  4. K Flip Flops
These kinds are same in the composition of circuits, but the working, Construction and the results are different from each other. We'll Describe the structure of each of them along with the simulation for best concepts one after the other.

DID YOU KNOW??????????????

Flip Flops can maintain a binary state as long as there is power in the circuit, therefore can store the Data.

SR Flip Flop

The full name of SR Flip Flop is Set Reset Flip Flop. In this type of Flip Flop the Value of Output Q depends upon the Value of the "S" input. once the input of the SR Flip Flop goes high (When S and R are high) the output goes to infinity or undefined therefore this Circuit is used to  store the information.

Truth Table of SR Flip Flop

When we talk about the Truth Table of SR Latch, we find some unique behavior. The Interesting point about the SR Latch is when Set and Reset are LOW i.e, 0 then the value of the Output does not change. The circuit does not show any alternation. Moreover, when the values of inputs are HIGH, the output is undefined as discussed above. Hence the design of Truth Table of SR Flip Flop is as follow:
S R Q Q’
0 0 No change No change
0 1 0 1
1 0 1 0
1 1 Undefined Undefined
  The SR Flip Flops are further classified into two main types:
  1. Active High SR Flip Flops.
  2. Active Low SR Flip Flops.
we'll learn about their details and the structure of the circuit.

Active High SR Flip Flops

The Active High SR Flip Flops are the one in which the Set input and the output terminal Q collaborate with each other. When the S is 0, the output Q is 1 and vise versa. We know that Q is always opposite to Q' hence we get the output as expected. Let's Look at the circuit of Active High SR Flip Flop and work at it in Proteus ISIS.

Active High SR Flip Flops in Proteus ISIS

  • Fire Up your Proteus Software.

Material Required

  1. AND Gate
  2. NOR Gate
  3. NAND Gate
  4. Logic Toggle
  5. LED-Red
  6. Clock
  7. Ground Terminal
  8. Connecting Wires
  • Click at the "P" button and Write AND Gate, NOR Gate, Logic Toggle, LED-Red, Clock one after the other and choose them through Enter button.
  • Choose AND Gate from the Pick Library section and arrange two of them at the working area.
  • Get two NOR Gates and arrange them just after the AND Gates.
  • Get two Logic Toggles and Arrange them just before AND Gate for input.
  • Choose two LEDs and fix them just after the NOR Gates.
  • Ground each LED through ground Terminal Found in the Terminal modes at the left side of screen.
  • Use a Clock in between AND Gates.
  • Join all the components through wires just like the image given below:
Now Pop the Play button. Alter the Values of Input and observe all the outputs at each Logic Gate. You will get following Truth Table:
S R 1 2 Q Q’
0 0 0 0 No change No change
0 1 0 1 0 1
1 0 1 0 1 0
1 1 Undefined Undefined Undefined Undefined

DID YOU KNOW???????????

The inputs of Active Low SR Flip Flops are denoted by a a bar , a complement or a "not" word along with their name.

Active Low SR Flip Flop

The Active Low SR Flip Flops have the same output as their twin Circuit Active High SR Flip Flop. The difference is in the construction of the circuit. We use the NAND Gate in the Construction of Active Low SR Flip Flop. all other arrangements and devices are same as the previous one.

Simulation of Active Low SR Flip Flop in Proteus ISIS

  • In the above Circuit of Active High SR Flip Flop, pop the left click at gate 1.
  • Left click>Delete the Gate 1.
  • Repeat the same step with other gates as well.
  • Add the NAND gate in all the places.
  • Arrange the system again as shown in the figure below:
When we Test the Active Low SR Flip Flop we get the following outputs:
S' R' 1 2 Q Q’
0 0 0 0 No change No change
0 1 1 1 0 1
1 0 1 1 1 0
1 1 Undefined Undefined Undefined Undefined
Hence this is another form of SR Flip Flop. Consequently, we learned about the Flip Flops, we saw what are its types , saw the subclasses of the Flip Flop and designed two types of SR Flip Flops in Proteus ISIS. Stay tuned for the other tutorial in which we'll solve the problem of undefined conditions of Flip Flops.

How to Select the Right LMS Vendor for your Business?

Learning Management Systems have gained popularity with technological advancements.  The curiosity to learn NEW made the information available with just a few clicks away. That’s how e-learning was born! Now, it has become inevitable for every business to adapt to the trend. When it involves developing a course from scratch, you need LMS.  Well, by what norms do we identify LMS vendors for my business? Here are five checkpoints you should know when choosing an LMS vendor.
  • The background

It is quite common when you are choosing an LMS vendor; you look for the price. Beyond the quote they are offering, you need to verify their track record. Ask the following questions to acquire the vendor’s level of the business.
  1. How long has the LMS dealer been in the industry?
  2. How many customers does the vendor have dealt with so far?
  3. What are the evolving trends in LMS?
  4. What are the common priorities of customers?
  5. Which features of LMS are used most in recent times?
You can infer the quality of the LMS vendor in the business from his answers.
  • The knowledge on e-learning

E-learning is the prime motive of the Learning Management System (LMS). If your LMS vendor doesn’t have enough knowledge about it, he is out of the game.  His leadership skills will show whether they (the company) have a stagnant product or have a room for innovation.  For example, Artificial Intelligence and Game-full thinking are the desirable features most learners and employees are looking forward to in their training modules and online courses.  The LMS you are purchasing must have at least the introductory version of these features so that you can up-level your course in years down the lane. [caption id="attachment_161291" align="aligncenter" width="300"] online education concept - e-learning word cloud on a vintage slate blackboard[/caption] Moreover, the publication of high-quality content will prove the vendor’s expertise in offering valuable information to prospects and clients.  Also, check for the technical aspects like Flash and SCORM in the LMS.
  • Customer Relationship Management

Who they are is essential but how they treat the customers is significant.  The response timing, language, and patience to solve the issues are the qualities that will impact you as a customer from LMS vendors. Check for information about the team members and multiple customer support from their website. It will reveal their identity. Consider how they value customer satisfaction and deal with multiple test ticket numbers simultaneously. This little follow-up communication clarifies their persona to you.
  • A Live Demo -Free trial

Although verbal information gives you an overview, a test drive will reflect the working of LMS. It is good to ask for a free trial or a live demo.  You can gain first-hand experience; thus, comprehending whether the product meets your needs or not. For example, if you intend to offer multi-lingual support to your global employees in online training, you need to ensure the LMS is enabled with it. Plus, enquire the LMS vendor on the scalability functions to fulfil your future needs. 
  • Look for Client views

Testimonials, reviews, and case studies will give you the user experiences straight from the previous clients.  It would be best to get references from other companies who use LMS and consider their insights.  These existing customers will tell you information on how LMS vendors respond to the issues. Besides, it is essential you team up with an LMS provider who has solid financial health.  This is because vendors with constant cash flow can perform research and development to upgrade their product, thus offering you a better version. 

The Bottom line

The initial point to all your training and management needs starts with choosing the right LMS vendor. We hope all these details will narrow down your search for the appropriate LMS provider.

Junction Field Effect Transistor (JFET) Simulation in Proteus ISIS

Hello Learners, hope you are doing well. I am here with a new tutorial. We'll discuss about Junction Field Effect transistors. In this tutorial, we will learn the basic Introduction to JFET nad will also have a look at its practical Implementation and simulation in Proteus. Basically, Junction Field Effect is a type of transistor, similar to Bipolar Junction Transistors but they have different characteristics due to some reasons as discussed below:

Introduction to JFET

We Define the JFET as:
"Junction Field Effect transistors or simply JFET is the semiconductor ,Voltage Control, three terminal device that is present in both configurations either N channel or P channel."
JFET  are named so because the the operation of JFET relies on the Field of the input gate voltage thus they are voltage operated devices. The Input of JFET is called Gate whereas, the output is said to be Drain.

Explanation about JFET

Junction Field Effect Transistors are important Devices in the world of electronics. They look similar to the transistors but are different in their Production.

Terminals of JFET:

JFET's have two Ohmic connections at either side of the channels. These channels are called Source and Drain. the Connection of Drain and source is said to be Gate. This is the point where PN Junction is formed. Source and Drain Collectively makes resistive path through which the current Id passes due to the Voltage Vds. The channel is semiconductor due to which current is passed equally well at both sides. But, because of the resistivity of the channel, the voltage becomes less Positive when we move from Drain to Source. Subsequently, the PN junction contains the high reverse bias at Drain as compared to the Source. Thus, the a Depletion Region is formed due to biasing whose width increase with the increase in the Biasing and vise Versa.

Configuration of JFET:

We know that Transistors are made by two type of materials i.e, N type and P type. The Terminals are connected by a current path between Drain and Source. these two terminals work as Collector and Emitter, respectively. Hence we observe two Configurations of JFETs:
  1. N-Type.
  2. P-Type.
Within the P-Type Configuration, we observe the doping of acceptors. hence holes are abundant in this region. by the same token, N- type configuration contain the doping of the electrons hence we get the faster conduction in N-Type region. We'll use N type JFET for the experiment.

Types of JFET:

Base upon their Production, we classify the JFET in two types:
  1. Standard JFET
  2. Insulated Gate JFET
The 2nd type i.e, IGJFET is most Commonly called Metal Oxide Junction Field Effect Transistor or simply MOSFET.

Conduction of JFET:

JFET are unipolar Devices and their efficiency mainly depends upon the Conduction of holes and electrons in P-Channel and N-channel, respectively.

 Implementation of JFET in Proteus ISIS

The Junction field effect transistors has very specific characteristics that can easily observed on the graph at a glance. Hence, let's start the simulation for best understanding.

Material Required:

  1. Junction Field Effect Transistor (2N3819)
  2. DC Power Supply
  3. Ground Terminal
  4. Current Probe
  5. DC Transfer Curve Analysis

Procedure for the characteristics of JFET:

  • Fire up your Proteus Software.
  • Pick Up the JFET from the Pick Library through the "P" button.
  • Set the JFET on the working area.
  • Foster the "DC" from the power Generation mood of the Proteus.
  • Fix 1 DC power supply at the Gate Terminal and the other on the Drain Terminal.
  • Pick the Ground terminal from "Terminal mode" and fix it with the Source.
  • At this stage, the circuit should look like the picture given below:
  • Place the Current probe taken from the side of the Proteus at the Drain.
One point must be clear here, the direction of the probe should be towards the drain showing that the current passes from the Current source towards the Drain terminal of JFET.
  • Name the Gate source as "Vgs".
  • Name the Drain power supply as "Vds".
  • Mark the Current Probe as "Ids".
  • Choose "Transfer" from the Graph mode at the left most bar of the Proteus.
  • Click on the Working area and make a window of the "DC Transfer Curve Analysis".
  • To get the output, we will drag the Id at the graph area.
  • At the instance, we have to set the Graph according to our need. Truss, Double click the graph to edit the Properties.
  •  Set the Values according to diagram:
Now, when we simulate the graph by left click>simulate the graph, we find a simulation log.
  • Simulate the graph through the Play button.
  • Maximize the screen through left click at Graph>maximize and Observe the output.

Observations of JFET Characteristics:

  • Vgs applied to the Gate Controls the Current flowing between Drain and the Source.
  • No current flow through the Gate hence the Source current that is flowing out of the device is equal to the Drain current moving into the device.
Mathematically,

Is=Id

  • We observe the four types of regions here:
  1. OHMIC Region: JFET acts like a voltage resistor when voltage VGS =0 because the depletion region at this point is very less.
  2. Pinch-off region: Resistance is maximum when Vgs is sufficient to cause the JFET to act as an open Circuit. This region is also called Cut-off region.
  3. Saturation Region: In this Region, the JFET becomes the Good Conductor and be controlled by Vgs. The Vds has very less effect.
  4. Breakdown Region: We observed that the in this region, the Vds becomes maximum and is controlled.

Advantages of JFET:

  • They are replaced by the BJT because they are similar to BJT in characteristics like efficiency , robust, instant operation but are smaller than the equivalent Bipolar Junction Transistors. Thus they are better.
  • Due to the size, they have less power consumption and low power dissipation, therefore are ideal to use in ICs and the CMOS range of circuit.
  • They have extremely high input Impedance tat can be more than thousands.
Consequently, We learnt about extremely important features of the Junction Field Effect Transistor, Perform the experiments for the characteristics and observed the Advantages of JFETs.

Half Adder through XOR with AND Gate in Proteus ISIS

Hello Pupils! I welcome you to The Engineering Projects. I hope you are having a good day. In our previous lectures, we simulated almost all the DLD Logic Gates i.e. AND, OR, NOT, NOR, NAND, XOR and XNOR. I hope now you must have a complete understanding of the logic gates and their working.

Now, it's time to have a look at the reason for inventing these logic gates. These DLD logic gates are used to design different numerical modules i.e. adder, subtracter, multiplexer, de-multiplexer, encoder, decoder etc. These arithmetic modules are normally used in electronic products i.e. a simple microcontroller has numerous adders/subtractors for properly calling the registers' addresses.

So, from today onward, we are going to discuss these applications of logic gates one by one. Today, we will focus on the basic one i.e. Half Adder. First, we will understand its working and later will simulate it in Proteus.

Let's have a look at what we'll learn today.

  1. What is an Adder?
  2. What is Half Adder?
  3. Truth Table of Half Adder.
  4. Half Adder Simulation in Proteus.
  5. Advantages of Half Adder.
  6. Disadvantages of Half Adder.

Let's start the Learning.

What is Adder?

  • In DLD, an Adder is a simple digital circuit, designed using logic gates and is used to add binary numbers(normally bits).
  • Advance Adders can also add other number systems i.e. Binary Coded Decimal, HexaDecimal etc.
  • There are two types of Adders, named:
  • Half Adder
  • Full Adder. (We will cover it in the upcoming lectures)

Now, let's have a look at the definition of Half Adder:

What is Half Adder?

  • A Half Adder is a simple arithmetic electronic circuit, designed using logic gates to add two binary numbers.
  • A Half Adder produces two Outputs of 1-Bit each. These outputs are the Sum and Carry of the added numbers.
  • The numbers being added(i.e. inputs of Half Adder) are called augend and added.
  • A simple Half Adder is shown in the below figure:
  • We will understand the working of Half Adder in the next section but for now, we can see in the above figure, the Adder circuit has two inputs and 2 outputs.
  • The first output is Sum Bit and the second one is Carry Bit.
  • A simple Block Diagram of Half Adder is shown below:

Logical Circuit

In order to design a DLD Half Adder, we will need to use the following two logic gates:

  1. XOR Gate
  2. AND Gate

If we recall from our previous lectures on logic gates, the XOR Gate is used to provide the Sum of the Inputs, while the AND Gate provides the Carry of the Inputs. So, by combining these two gates, we can easily get both the Sum and the Carry.

Mathematically,

  SUM = A XOR B

CARRY = A AND B

  • Here's the Truth Table of XOR Gate:
A B Z
0 0 0
0 1 1
1 0 1
1 1 0
  • The Truth Table of AND Gate is given below:
A B Y
0 0 0
0 1 0
1 0 0
1 1 1

Let's move towards the Practical implementation of Half Adder in Proteus ISIS.

Simulation of Half Adder in Proteus

To design the circuit of Half Adder, we need the following components:

Components Required:

  1. AND Gate.
  2. XOR Gate.
  3. Logic toggle.
  4. LED.
  5. Ground Terminal.

Circuit Diagram of Half Adder

  • Select the first four components from the Proteus Library.
  • Place the XOR Gate and AND gate in the Proteus Workspace.
  • Connect the Logic Toggles on the Inputs of the XOR Gate.
  • Join the inputs of AND Gate with the Inputs of XOR Gate.
  • Connect the LEDs with the output Terminals of both Gates.
  • Add the ground terminal with both LEDs.
  • The below figure shows the Half Adder Circuit in all possible scenarios:
  • Here's the Truth Table of Half Adder:
Input Output
A B Sum
C0
0 0 0 0
0 1 1 0
1 0 0 0
1 1 1 1

Advantages of Half Adder

  1. Half Adders are simple in construction & easy to design.
  2. We can get a Half Subtractor simply by inverting the circuit.

Disadvantages of Half Adder

  1. There is no mechanism to use the carry in the next addition.
  2. Can perform very specific functions.

So, that was all for today. I hope you have enjoyed today's lecture. Today, we designed the Half Adder using AND and XOR gates. In the next lecture, we will design the Half Adder using Universal Gates i.e. NAND and NOR gates. Till then, take care. Have fun!!!

Half Adder with Universal Logic Gates

Hello Pupils! I welcome you to The Engineering Projects. I hope you are having a good day. In our previous lecture, we discussed Half-Adder Circuit Designing with XOR and AND logic gates. Today, we are going to design the same circuit using universal logic gates i.e. NOR and NAND gates.

We are going to learn the following topics, in today's lecture:

  1. What is Adder?
  2. What is Half Adder?
  3. How can We make Half Adder Circuit through NAND Gate?
  4. How can We make Half Adder through just NOR Gate?

Hence without wasting time, Let's find all the Answers.

What is Adder?

As we discussed in the last lecture, the DLD Adder is a simple electronic circuit, used to add binary numbers in bit form.

There are two types of DLD Adders, named:

  1. Half Adder
  2. Full Adder

In this article, we'll focus on the Half Adder only.

What is Half Adder?

Let's recall it as well from our previous lecture, a Half Adder is a simple electronic circuit, designed with logic gates and is used to add two binary numbers. It generates two output bits i.e. Sum Bit and Carry Bit.

In our previous lecture, we designed the Half Adder using two types of Logic Gates i.e. AND and XOR but today, we are going to use a single type of logic gate(Universal Gate) to design a Half Adder. As we know there are two universal gates in DLD i.e. NOR and NAND. So, we will design the Half Adder circuit with both of these Universal Gates, shown in the below figure:

Truth Table of Half Adder

  • The Truth Table of the Half Adder is shown in the below table:
Input Output
A B Sum
C0
0 0 0 0
0 1 1 0
1 0 1 0
1 1 0 1

Half Adder with NAND Gate

Let's first recall the NAND Gate:

"A NAND Gate is an inversion of AND Gate and gives LOW output if all of its Inputs are HIGH, otherwise gives HIGH output".

The Truth Table of NAND Gate is shown below:

A B (A.B)'
0 0 1
0 1 1
1 0 1
1 1 0

Let's rush towards the Proteus software to run our Half Adder.

Components Required

We will need the following components to design Half Adde circuit in Proteus:

  1. NAND Gate
  2. Logic Toggle
  3. LED
  4. Ground Terminal

Proteus Simulation of Half Adder

  • Here's the Circuit Diagram of the Half Adder with the NAND gate in Proteus:
  • For designing the Half Adder circuit, we'll need 5 NAND gates in total, so get them from Proteus Library and place them in the Workspace, as shown in the above figure.
  • I have used two Logic States at the Inputs and two LEDs at the Outputs.

In order to understand this Half Adder circuit, let's create a truth table of output at each NAND Gate:

Input Output
A B 1 2 3 4(SUM) 5(CARRY)
0 0 1 1 1 0 0
0 1 1 1 0 1 0
1 0 1 0 1 1 0
1 1 0 1 1 0 1
 

Half Adder with NOR Gate

Let's recall the NOR Gate from our previous lecture:

"A NOR Gate is an inversion of the OR Gate and gives HIGH Output only if all of its Inputs are LOW, otherwise it gives LOW".

The Truth Table of NOR Gate is as follows:

A B (A+B)’
0 0 0
0 1 0
1 0 0
1 1 1

To implement the Half Adder with NOR Gate, we are going to use the below components:

Components Required:

  1. NOR Gate.
  2. Logic Toggle.
  3. LED.
  4. Ground Terminal.
  5. Connecting wires.

Proteus Simulation of Half Adder

Here's the circuit diagram of the Half Adder with NOR logic gate:

As you can see in the above figure, we have used 5 NOR gates in total and have placed logic states at the inputs and LEDs at the outputs.

Here's the truth table of Half Adder with NOR Gate:

Input Output
A B 1 2 3 4(SUM) 5(CARRY)
0 0 1 1 1 0 0
0 1 0 0 1 1 0
1 0 1 0 0 1 0
1 1 0 0 0 0 1

So, that was all for today. In the next lecture, we will discuss the 2-Bit Full Adder in detail and will simulate it in Proteus. Thanks for reading.

6 Ideas for Establishing an Engineering Consulting Firm

Hello friends! Welcome to another useful article of The Engineering Projects. I hope you are having a shinning day. Let's add some reproductive information in your day. Today we'll grasp about the establishment skills in Engineering Consultant Firm. Consequently, we'll learn about 6 tremendous ideas for the Establishment an Engineering Consultant. Starting any business can be difficult. As a matter of fact, some individuals state that around a third of new enterprises fail within the first year of operation. From there, this does not get any easier. These numbers increase to half by the second year of running a business. This might put you off when you decide to start your engineering consulting firms. However, you can make an engineering consulting company a success by considering the below ideas:

Be Strategic About Scheduling and Quoting

Quoting projects for the first time is challenging, though asking individuals who carried out the same tasks would be great to start. The best thing you may do for your clients is to meet them where they are. Many of your clients will be entrepreneurs who have a specified budget for work they need to be completed. Scheduling projects will also depend on your bandwidth. It will not benefit anyone when you have a lot of work that you can hardly handle. If you can quote for more time, clients will be happier when you deliver their projects early.

Learn How to Reduce Costs

Most organizations choose to implement CMMS in an attempt to decrease maintenance costs as well as enhance their bottom line in different ways. Therefore, what is CMMS software? Well, the software is a system, which facilitates the upkeep operations and centralizes maintenance information. This will help optimize the availability and utilization of physical equipment, such as plant infrastructures, communications, vehicles, and machinery. Your CMMS can also help you decrease the total number of reactive maintenance and unplanned breakdowns of your machines.

Gain Skills

When starting an engineering consulting company, you will need the necessary skills. After you decide on the value proposition, you need to gain the right skills and necessary knowledge. You should also be a degree holder. Engineers with a degree certificate are likely to establish their own firms. Later on, they may pursue a degree in management so as to acquire skills and learn how to work.

Have a Plan

When writing a plan for your engineering consulting company, you may include an executive summary, which explains your experience. Moreover, you may include the goals of your business and an explanation regarding your engineering company. You can as well offer detailed monetary information about your engineering consulting company.

Delegate Work

Regardless of which maintenance strategy you have, your maintenance team may need to deal with unplanned work. Human error, machine malfunctions, natural disasters, and accidents are some of the things you may not avoid completely. However, assigning projects to work orders will help technicians choose which work should be completed first. This may be important in emergencies when you require every hand on deck. In such a situation, you may use a mobile CMMS so as to send a push notification and develop a work order to every technician.

Consider Content Marketing

Inbound marketing is constructed around four different phases, including converting, delighting, closing, and attracting. Basically, you have to lure visitors to your site, close sales, delight clients, and convert customers into quality leads. The top-secret to effective inbound marketing lies in using the right messaging and content to target the correct audience in real-time. This will need a working knowledge of buyer personas. When it comes to engineering consulting companies, buyer personas tend to be disparities on decision-makers in construction firms, real estate developers, architectural organizations, and government agencies. In your buyer persona, you may include other useful details related to purchasers' motivations and demographic profile.

Concluding Remarks!

As an engineer, it’s not a must you work in an established engineering company. Immediately you have the experience to work in your specialty, you may launch your own firm. Whether you are a structural, mechanical, electrical, civil, and computer engineer, you may start a new engineering consulting firm. If you want to develop many engineering projects and establish a client list, you can consider some of these ideas.

NAND as Universal Gate in Proteus

Hello Learners! Welcome to The Engineering Projects. In the previous tutorial, we discussed the first universal gate i.e. NOR Gate and simulated it in Proteus. Today, we are going to focus on the second universal gate i.e. NAND Gate. We will also derive basic logic gates from the NAND gate, to prove its universality.

Today, we'll seek the answers to the following questions:

  1. What is a NAND Gate?
  2. What is a Universal Gate?
  3. NAND as a Universal Gate.
  4. NAND Gate as Universal Gate in Proteus ISIS.

Let's get started:

What is a NAND Gate?

  • A NAND Gate is designed by inverting the output of AND Gate and thus it gives a LOW output when all of its inputs are HIGH, otherwise, it's HGIH.
  • In order to design a NAND gate, simply place a NOT gate in front of the AND gate.
  • A and B are two inputs of the NAND Gate, Output Y is denoted by a dot between the inputs along with a combined compliment or a bar on the whole statement.

Y= (A.B)'

  • The graphical symbol of the NAND Gate is the same as that of the AND gate, except there's a small bubble at the start of the output to represent NOT. The graphical representation of the NAND gate is shown in the below figure:

Truth Table and Timing Diagram of NAND Gate

  • Here's the Truth Table of the NAND Gate(Inverse of AND Gate):
A B (A.B)’
0 0 1
0 1 0
1 0 0
1 1 0
  • The timing diagram of the NAND gate is shown below:

What is a Universal Gate?

In Logic Circuits, we often use a term called "Universal gates". this can be defined as:

"The category of Logic Gates, through which we can derive all the Basic Gates are called universal Gates."

We have two Universal Gates, NAND Gate and NOR Gate. These have importance in the world of Digital Logic Designs because of their simplicity and usefulness.

NAND as a Universal Gate

As discussed before, NAND Gate is a Universal Gate because we can design any logic gate with a NAND Gate. Let's design the following logic gates with a NAND Gate:

  1. OR Gate
  2. AND Gate
  3. NOT Gate

Components Required:

  1. NAND Gate
  2. Logic Toggle
  3. Logic Probe
  4. Connecting Wires
Take the discussed elements from the pick library One after the other through "P" button. Follow the instructions to make all the Gates one by one.

Basic Gates through NAND Gate

OR Gate

While Designing the OR Gate through NOR Gate, we must have the knowledge about one rule of Digital Logic Design that says:
"The Compliment of the ANDed input is equal to the ORed inputs."
Mathematically,

(A'B')'=A+B

  • Take an NAND gate from the library and fix it at the working area.
  • Repeat the step two times.
  • Connect the output of two NAND Gates with the input of third one.
  • Connect the  inputs of other two remaining Gate with each other through a wire to set them as one input.
  • Connect logic Toggles as the input with two NAND Gates.
  • Join Logic Probe to visualize the output.
The circuit looks like this:
  • Pop the play button.

Change the value of inputs one by one and record the output in the form of table.AND Gate

We'll Design AND Gate through NAND Gate on the basis of the following rule of logic Design:
"The Compliment of ANDed inputs is equal to the ANDed inputs."

(A.B)'=A.B

  • Get two NAND Gates from Pick Library.
  • Set them at the working area.
  • Join then inputs of 2nd Gate with each other.
  • Set Logic toggles at the input of the 1st one.
  • Join Logic Probe with the output of 2nd one.
  • Connect the output of the 1st Gate with the inputs of the other.
  • Change the inputs through Logic Gates.
  • Record the truth table according to the output.

NOT Gate

The formation of NOT Gate through NAND Gate is based upon the rule:
"The Compliment ANDed input with itself is equal to the complement of input."

(A.A)'=A'

  • Take the NAND Gate.
  • Fix it at working area.
  • Connect its both inputs with each other.
  • Connect Logic Toggle and Logic Probe.
  • Change the inputs.
The resultant Truth Table is: NOTE: You can Gain the same output by following the rule (A.1)'=A'

Advantages of NAND Gate

  1. NAND Gate is a universal gate therefore it can make the circuit less complex.
  2. We can use them for the functionality of more than one Gate.
  3. It stores more storage capacity as compared to its size.
  4. It is Cost effective per byte.

Real life Applications of NAND Gate

  1. Freezer warning buzzers.
  2. Burglar Alarms.

Disadvantages of NAND Gate

  1. It is Difficult to design than other Gates.
  2. It has propagation delay.
  3. The high Gate count is also a disadvantage.
Consequently, we recognized the Core detail of NAND gate, we learnt what are the universal gate and how can we make different gates with NAND gate using Proteus simulation. moreover, we got some of the advantages, disadvantage and   some real life applications of NAND Gate.

NOR as Universal Gate in Proteus ISIS

Hi Mentees! I hope you all are having a Productive Day. In our previous lecture, we discussed the DLD Basic Logic Gates and simulated them in Proteus. Today, we are going to use these standard logic gates and will design another logic gate named NOR Gate and will also simulate it in Proteus.

In this tutorial, we'll learn the following concepts:

  1. What is a NOR Gate?
  2. Why NOR is called Universal Gate?
  3. How to derive other Gates through NOR Gate?
  4. Advantages of NOR Gate.

Let's begin the exploration:

What is a NOR Gate?

  • "NOR gate is designed by inverting the output of an OR Gate, so it gives a HIGH output, only when all the inputs are LOW."
  • In simple words, a NOR Gate has an OR Gate followed by the NOT Gate, as shown in the below figure:
  • The Graphical Symbol of a NOR Gate is the same as that of the OR gate but we place a small bubble at the start of the output, which represents the NOT gate, shown in the above figure.
  • Assume that A and B are the inputs of a NOR Gate, Output Y is denoted by a plus sign between inputs with a collective bar or complement sign on the whole statement as:

Y = (A + B)'

Truth Table and Timing diagram of NOR Gate

A Truth Table is a tabular representation of a logic gate having all the possible scenarios. The Truth table of the NOR Gate for 2 inputs is as follows:

A B (A+B)’
0 0 1
0 1 0
1 0 0
1 1 0
  • The timing diagram of the NOR Gate is as follows:

What is a Universal Gate?

  • A logic gate is called Universal Gate, if we could design all the other logic gates using it.
  • There are two Universal Gates available, named:
  • NOR Gate.
  • NAND Gate. (we will cover in the next chapter)

We have studied basic DLD logic gates i.e. AND, OR and NOT in our previous lecture. We can design all these gates with the Universal Gate. Let's have a look:

NOR as Universal Gate in Proteus ISIS

In this section, we are going to design the 3 basic logic gates(AND, OR and NOT) using NOR gate. While Designing the circuits, we need the following components:

Material Required

  1. NOR Gate
  2. Logic Toggle
  3. LED
  4. Ground Terminal
  5. Connecting Wires

NOT Gate

  • In order to design a NOT Gate with NOR Gate, we simply need to combine the inputs.
  • Mathematically,

(A.A)'=A'

  •  The Proteus simulation of NOR gate acting as a NOT gate, is shown in the below figure:
  • I have attached an LED at the output to analyze the working.
  • Hence, we found the Truth Table as:

OR Gate

During the formation of OR Gate through NOR Gate, we have to keep in mind the following statement:
"The output of NORed inputs is also the ORed input."
We denote this Statement as:

(A.B)'=A+B

  • Take two NOR Gates.
  • Connect the second NOR Gate's inputs with each other.
  • Join the output of first one with the output of the other.
  • Join grounded LED and Logic Probes for input and output respectively.
  • Pop the play button.
Change the Values of Logic toggles according to the truth table. Notice that in the formation of current Gate, we implemented the NOT Gate, derived from the NOR Gate that we made before this.

AND Gate

The core statement of the formation of AND Gate through NOR is given next:
"The NORed output of Complements of the input is AND Gate."
Mathematically,

(A'+B')'=AB

  • Get the two NOR Gates from Pick Library.
  • Fix them vertically at the working sheet.
  • Connect the input of each of them with themselves.
  • Join Logic Toggle with each of it.
  • Take another NOR Gate from the pick Library.
  • Connect the output of 1st two with the input of the third.
  • Get the Grounded LED and fix it at the remaining output.
  • Press the Play sign of the Proteus ISIS.
  • Design the Truth Table by applying the required inputs.
[TEPImg9]

Advantages

  1. It occupies little space.
  2. It is less expensive.
  3. we can use it in the place of four Gates.
  4. It is less complex.
Truss, Today we learnt about the core concepts about the NOR Gate. we saw why we call it as universal Gate and also we saw the Practical experiments to prove our discussion.
Syed Zain Nasir

I am Syed Zain Nasir, the founder of <a href=https://www.TheEngineeringProjects.com/>The Engineering Projects</a> (TEP). I am a programmer since 2009 before that I just search things, make small projects and now I am sharing my knowledge through this platform.I also work as a freelancer and did many projects related to programming and electrical circuitry. <a href=https://plus.google.com/+SyedZainNasir/>My Google Profile+</a>

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Syed Zain Nasir