141 Items
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JK Flip Flop Circuit Diagram in Proteus TEP , The Engineering Projects , Boxes
Flip Flops, JK Flip Flops, JK Flip Flop in Proteus, JK Flip Flop with gates, JK Flip flop with ic, JK Flip Flop in Proteus, JK Flip Flop Proteus simulation.
<img src="https://images.theengineeringprojects.com/image/main/2021/01/jk-flip-title.png" alt="Flip Flops, JK Flip Flops, JK Flip Flop in Proteus, JK Flip Flop with gates, JK Flip flop with ic, JK Flip Flop in Proteus, JK Flip Flop Proteus simulation." class="alignCenter" width="300" height="260" srcset="https://images.theengineeringprojects.com/image/300/2021/01/jk-flip-title.png 300w, https://images.theengineeringprojects.com/image/600/2021/01/jk-flip-title.png 600w" sizes="(max-width: 300px) 100vw, 300px" decoding="async" loading="lazy" ...
4 Tips for Better Construction Job Bids TEP , The Engineering Projects , Boxes
bit, tips for bidding, job bids, bids for job, how to get a good job bid.
<img src="https://images.theengineeringprojects.com/image/main/2021/01/bid.png" alt="bit, tips for bidding, job bids, bids for job, how to get a good job bid." class="alignCenter" width="300" height="183" srcset="https://images.theengineeringprojects.com/image/300/2021/01/bid.png 300w, https://images.theengineeringprojects.com/image/600/2021/01/bid.png 600w" sizes="(max-width: 300px) 100vw, 300px" decoding="async" loading="lazy" onclick="openImage(this)"/> Hello Buddies, Welcome from the team of The Engineering Projects. We hop ...
Implementation of SR Flip Flops in Proteus TEP , The Engineering Projects , Boxes
Flip Flop, SR Flip Flop, Active High SR Flip Flop, Active Low SR Flip Flop, Flip Flop In Proteus, SR Flip Flop in Proteus
<img src="https://images.theengineeringprojects.com/image/main/2021/01/sr-flip-1.png" alt="Flip Flop, SR Flip Flop, Active High SR Flip Flop, Active Low SR Flip Flop, Flip Flop In Proteus, SR Flip Flop in Proteus" class="alignCenter" width="300" height="204" srcset="https://images.theengineeringprojects.com/image/300/2021/01/sr-flip-1.png 300w, https://images.theengineeringprojects.com/image/600/2021/01/sr-flip-1.png 600w" sizes="(max-width: 300px) 100vw, 300px" decoding="async" loading="lazy" onclick="openImage(this)"/> Hello ...
How to Select the Right LMS Vendor for your Business? TEP , The Engineering Projects , Boxes
e-Learning , tips for LMS Vendor, LMS vendor, Learning Management system.
<img src="https://images.theengineeringprojects.com/image/main/2021/01/lms-title.jpg" alt="e-Learning , tips for LMS Vendor, LMS vendor, Learning Management system." class="alignCenter" width="300" height="169" srcset="https://images.theengineeringprojects.com/image/300/2021/01/lms-title.jpg 300w, https://images.theengineeringprojects.com/image/600/2021/01/lms-title.jpg 600w" sizes="(max-width: 300px) 100vw, 300px" decoding="async" loading="lazy" onclick="openImage(this)"/> Learning Management Systems have gained popularity wit ...
Junction Field Effect Transistor (JFET) Simulation in Proteus ISIS TEP , The Engineering Projects , Boxes
Junction Field Effect Transistor, transistor characteristics, JFET and its characteristics in Proteus, Proteus implementation of JFET
<img src="https://images.theengineeringprojects.com/image/main/2020/12/j.png" alt="Junction Field Effect Transistor, transistor characteristics, JFET and its characteristics in Proteus, Proteus implementation of JFET" class="alignCenter" width="300" height="192" srcset="https://images.theengineeringprojects.com/image/300/2020/12/j.png 300w, https://images.theengineeringprojects.com/image/600/2020/12/j.png 600w" sizes="(max-width: 300px) 100vw, 300px" decoding="async" loading="lazy" onclick="openImage(this)"/> Hello Learners, ho ...
Half Adder through XOR with AND Gate in Proteus ISIS TEP , The Engineering Projects , Boxes
Adder, Half Adders, Half adders in proteus, half adder through XOR and AND Gate
Hello Pupils! I welcome you to The Engineering Projects. I hope you are having a good day. In our previous lectures, we simulated almost all the DLD Logic Gates i.e. AND, OR, NOT, NOR, NAND, XOR and XNOR. I hope now you must have a complete understanding of the logic gates and their working. Now, it's time to have a look at the reason for inventing these logic gates. These DLD logic gates are used to design different numerical modules i.e. adder, subtracter, multiplexer, de-multiplexer, encoder, decoder etc. These arithmetic modules are normally used in electronic products i.e. a simple mic ...
Half Adder with Universal Logic Gates TEP , The Engineering Projects , Boxes
Half Adder, Half Adder through NAND, Half Gate through nor gate, half adder through single Gate
Hello Pupils! I welcome you to&nbsp;The Engineering Projects. I hope you are having a good day. In our previous lecture, we discussed Half-Adder Circuit Designing with XOR and AND logic gates. Today, we are going to design the same circuit using universal logic gates i.e. NOR and NAND gates.We are going to learn the following topics, in today's lecture: What is Adder? What is Half Adder?How can We make Half Adder Circuit through NAND Gate? How can We make Half Adder through just NOR Gate? Hence without wasting time, Let's find all the Answers. What is Adder?As we discussed in th ...
6 Ideas for Establishing an Engineering Consulting Firm TEP , The Engineering Projects , Boxes
ideas for engineering consultant firm, engineering consultant firm, engineering, ideas about engineering consultant firm
<img src="https://images.theengineeringprojects.com/image/main/2021/01/engineering-1-2.jpg" alt="ideas for engineering consultant firm, engineering consultant firm, engineering, ideas about engineering consultant firm" class="alignCenter" width="275" height="183" srcset="https://images.theengineeringprojects.com/image/300/2021/01/engineering-1-2.jpg 300w, https://images.theengineeringprojects.com/image/600/2021/01/engineering-1-2.jpg 600w" sizes="(max-width: 275px) 100vw, 275px" decoding="async" loading="lazy" onclick="openImage(this)"/> ...
NAND as Universal Gate in Proteus TEP , The Engineering Projects , Boxes
Universal Gtaes, universal gates in Proteus, NAND Gate, NOR Gate, Proteus Implelentation of gates, Logic Gates.
Hello Learners! Welcome to The Engineering Projects. In the previous tutorial, we discussed the first universal gate i.e. NOR Gate and simulated it in Proteus. Today, we are going to focus on the second universal gate i.e. NAND Gate. We will also derive basic logic gates from the NAND gate, to prove its universality. <img src="https://images.theengineeringprojects.com/image/main/2020/12/TITLE-OF-nanf.png" alt="Universal Gates, universal gates in Proteus, NAND Gate, NOR Gate, Proteus Implementation of gates, Logic Gates." class="alignCenter" width="384" height="23 ...
NOR as Universal Gate in Proteus ISIS TEP , The Engineering Projects , Boxes
Logic Gates, NOR Gate, Universal Gate, NOR as universal Gate, Proteus and Gates, Implementation of NOR Gate in Proteus, Proteus Circuit Gates.
Hi Mentees! I hope you all are having a Productive Day. In our previous lecture, we discussed the DLD Basic Logic Gates and simulated them in Proteus. Today, we are going to use these standard logic gates and will design another logic gate named NOR Gate and will also simulate it in Proteus. <img src="https://images.theengineeringprojects.com/image/main/2020/12/title-nor-as-universal.png" alt="Logic Gates, NOR Gate, Universal Gate, NOR as universal Gate, Proteus and Gates, Implementation of NOR Gate in Proteus, Proteus Circuit Gates." class="alignCenter" width="2 ...