Hey readers! Welcome to the next episode of training on neural networks. We have been studying multiple modern neural networks and today we’ll talk about autoencoders. Along with data compression and feature extraction, autoencoders are extensively used in different fields. Today, we’ll understand the multiple features of these neural networks to understand their importance.
In this tutorial, we’ll start learning with the introduction of autoencoders. After that, we’ll go through the basic concept to understand the features of autoencoders. We’ll also see the step by step by step process of autoencoders and in the end, we’ll see the model types of autoencoders. Let’s rush towards the first topic:
Autoencoders are the type of neural networks that are used to learn the compressed and low-dimensional representation of the data. These are used for unsupervised learning and are particularly used in tasks such as data compression, feature learning, generation of new data, etc. These networks consist of two basic parts:
Encoders
Decoders
Moreover, between these two components, it is important to understand the latent space that is sometimes considered the third part of the autoencoders. The goal of this network is to train and reconstruct the input data at the output layer. The main purpose of these networks is to extract and compress the data into a more useful state. After that, they can easily regain the data from the compressed state.
The following are some important points that must be made clear when dealing with the autoencoder neural network:
This is the first and most basic component of the autoencoders. These are considered the heart of autoencoders because they have the ability to compress and represent the data. The main focus of encoders is to map the input data from high dimensional space to low dimensional space. In this way, the format of the data is changed to a more usable format. In other words, the duty of encoders is to distill the essence of the input data in a concise and informative way.
The output of the autoencoders is known as latent space. The difference between the latent space and the original data is given here:
The dimension of the data is an important aspect of neural networks. Here, the dimensions are smaller and more compact than in the original data. Choosing the right dimension is crucial for efficient representation and detail in getting the details of the data.
The structure of the data from encoders (latent space) has information about the relationship between data points. These are arranged in such a way that similar data points are placed closer to each other and dissimilar data points are far apart. This type of spatial arrangement helps in the efficient retrieval and arrangement of the data in a more efficient way.
Feature extraction is an important point in this regard because it is easier with the latent space data than with the normal input data fed into the encoders. Hence, feature extraction is made easy with this data for processes like classification, anomaly detection, generating new data, etc.
The decoder, as the name suggests, is used to regenerate the original data. These take the data from the latent space and reconstruct the original input data from it. Here, the pattern and information in the latent space are studied in detail and as a result, closely resembling input data is generated.
Generally, the structure of encoders is the mirror image of the encoders in reverse order. For instance, if the architecture of the encoders has convolutional layers, then the decoders have deconvolution layers.
During the training process, the decoder’s weight is adjusted Usually, the final layer of the decoders resembles the data of the initial layer of the input data in the encoders. It is done by updating and maintaining the weights of the decoders corresponding to the respective encoders. The difference is that the neurons in the decoders are arranged in such a way that the noise in the input data of the encoders can be minimized.
The training process for the autoencoders is divided into different steps. It is important to learn all of these one by one according to the sequence. Here are the steps:
The data preparation is divided into two steps, listed below:
The first step is to gather the data on which the autoencoders have to work. For this, a dataset related to the task to be trained is required.
The preparation of the data required initial preprocessing. It requires different steps, such as normalization, resizing for images, etc. These processes are selected based on the type of data and the task. At the end of this process, the data is made compatible with the network architecture.
There are multiple architectures that can be used in autoencoders. Here are the steps that are involved in this step:
It is very important to select the right architecture according to the datasets. The encoder architecture aligns with the data type and requirements of the task. Some important architectures for autoencoders are convolutional for images and recurrent for text.
In the same step, the basic settings of the network layers are also determined. Following are some basic features that are determined in this step:
Determination of the number of layers in the network
Numbers of neurons per layer
Suitable activation functions according to the data (e.g., ReLU, tanh).
The training is the most essential step and it requires great processing power. Here are the important features of the autoencoders:
In this step, the processing of the input data is carried out. The data is sent to the encoder layer, which generates the latent representation. As a result of this, latent space is generated.
The latent space from the encoder is then sent to the decoder for the regeneration of the input data, as mentioned before.
Here, the decoders’ output is then calculated with the original input. Different techniques are used for this process to understand the loss of data. This step makes sure that the accurate data loss is calculated so that the right technique is used to work on the deficiencies of the data. For instance, in some cases, the mean squared error for images is used and in other cases, categorical cross-entropy for text is used to regenerate the missing part of the data.
Backpropagation is an important process in neural networks. The network propagates backward and goes through all the weights to check for any errors. This is done by the encoders as well as by the decoders. The weights and bosses are adjusted in both layers and this ensures the minimum errors in the resultant networks.
Once the training process is complete, the results obtained are then optimized to get an even better output. These two steps are involved here:
Different cases require different types of calculations; therefore, more than one type of optimizer is present. Here, the right optimizer is used to guide the weight update. Some famous examples of optimizers are Adam and stochastic gradient descent.
Another step in the optimization is the learning rate adjustment. Multiple experiments are done on the resultant output to control the learning speed and avoid overfitting the data in the output.
This is an optional step in the autoencoders that can prevent overfitting. Here, some different techniques, such as dropout and weight decay, are incorporated into the model. As a result of this step, the training data memorization and improvement of the generalization of the unseen data are seen.
The getting of the results is not enough here. Graduation monitoring is important for maintaining the outputs of the neural networks. Two important points in these steps are explained here:
During the training process, different matrices are assessed to ensure the perfect model performance; some of these are given here:
Monitor reconstruction loss
Checking for the accuracy of results
Checking the rate of precision
Recalling the steps for better performance
The evaluation process is important because it ensures that any abnormality in the processing is caused during its initial phase. It stops the training process to prevent any overfitting of the data or any other validation.
The autoencoders have two distinct types of models that are applied according to the needs of the task. These are not the different architectures of the data but are the designs that relate to the output in the latent space of the autoencoders. The details of each of these are given here:
In under-complete autoencoders, the representation of the latent space dimensions is kept lower than the input space. The main objective of these autoencoders is to force the model to learn all the most essential features of the data that are obtained after the compression of the input. This results in the discovery of efficient data representation and, as a result, better performance.
Another advantage of using this autoencoder is that it only captures the rare and essential features of the input data. In other words, the most salient and discriminative data is processed here.
The most prominent feature of this autoencoder is that it reduces the dimensions of the input data. The input data is compressed into a more concise way but the essential features are identified and work is done on them.
The following are important applications of this model:
The main use for an under-complete autoencoder is in cases where compression of the data is the primary goal of the model. The important features are kept in compressed form and the overall size of the data is reduced. One of the most important examples in this regard is image compression.
These are efficient for learning the new representation of the efficient data representation. These can learn effectively from the hierarchical and meaningful features of the data given to them.
Denoising and feature extraction are important applications of this autoencoder.
In over-complete autoencoders, the dimensions of the latent space are intentionally kept higher than the dimensions of the latent space. As a result, these can learn more expressive representations of the data obtained as a result. This potentially captures redundant or non-essential information through the input data.
This model enables the capture of the variation in the input data. As a result, it makes the model more robust. In this case, redundant and non-essential information is obtained from the input data. This is important in places where robust data is required and the variation of the input data is the main goal.
The special feature of the autoencoder is its feature richness. These can easily represent the input data with a greater degree of freedom. More features are obtained in this case that are usually ignored and overlooked by the undercomplete autoencoders.
The main applications of overcomplete autoencoders are in tasks where generative tasks are required. As a result, new and more diverse samples are generated.
Another application to mention here is representation learning. Here, the input data is represented in a richer format and more details are obtained.
Hence, today, we have seen the important points about the autoencoders. At the start, we saw the introduction of the autoencoders neural networks. After that, we understood the basic concepts that helped a lot to understand the working process of autoencoders. After that, we saw the step-by-step training of the autoencoders and in the end, we saw two different models that are adopted when dealing with the data in autoencoders. We saw the specific information about these types and understood the features in detail. I hope this is now clear to you and this article was helpful for you.
Hi pupils! Welcome to another article on integrated circuits. We have been studying different ICs in detail and today the topic is 74LS164. It is another important family member of the 74xx series of ICs and is widely used in different types of digital devices because it is a serial-in parallel-out shift register.
In this article, we’ll discuss the 74LS154 in detail. We’ll start with the introduction and after that, I’ll share a detailed datasheet with you that will help you understand the workings and basic structure of this app. After that, I’ll discuss the working principle and share a simple project of this IC in proteus. Moreover, I'll share the measurement of the dimensions of this IC and in the end, there will be the details of applications for 74LS164. This article has all the basic information about this IC and let’s start our discussion with its introduction
It is a synchronous reset register that takes the serial input but can process and represent the data in the parallel output.
It belongs to the 74LS family; therefore, it is a low-power Schottky TTL logic circuit.
It has an asynchronous clear.
It is a 14-pin dual inline package (DIP) and sometimes the package is a small outline integrated circuit (SOIC).
It acts differently in the situation. At the low logic level, it follows the logic given next:
It may inhibit the entry of new data
At the next clock pulse, it resets the flip-flops to the low level
As a result, it has complete control over the incoming data.
At the high logic level, any input enables other inputs and this determines the start of the first flip-flop.
This is one of the most simple and versatile registers; therefore, it has multiple applications in different fields where digital circuits are used.
The information about the datasheet of this IC will help you understand the basic information in detail.
The 14-pin package has a specific pin configuration. Each PIN has a specific name according to its function. This can be understood with the following connection diagram
It has the outputs on both sides of the IC.
A cut on the ground pin side indicates the right direction of the pin combination.
It has two serial inputs.
The details of the above diagram will be clear with the help of the following table:
Pin No |
Pin Name |
Description |
1 |
A |
Data Input |
2 |
B |
Data Input |
3 |
Q0 |
Output pin |
4 |
Q1 |
Output pin |
5 |
Q2 |
Output pin |
6 |
Q3 |
Output pin |
7 |
GND |
Ground Pin |
8 |
CP |
Clock Pulse Input |
9 |
MR’ |
Active Low Master Reset |
10 |
Q4 |
Output pin |
11 |
Q5 |
Output pin |
12 |
Q6 |
Output pin |
13 |
Q7 |
Output pin |
14 |
Vcc |
Chip Supply Voltage |
Table 1: 74LS164 pinout configuration
The combination of the inputs in this IC results in different conditions. Here is the detailed table for this:
CP |
DSM |
MR |
Operation |
Description |
Additional Notes |
↓ |
X |
X |
Clear (Asynchronous Master Reset) |
It immediately clears all flip-flops to 0, regardless of clock or other inputs. |
Overrides all other operations. |
↑ |
X |
H |
Hold (No Change) |
Maintains the current state of the register. |
It is useful for pausing data transfer or holding a specific value. |
↑ |
L |
X |
Load Parallel Data |
Loads the parallel data inputs (A-H) into the register. |
It occurs on the next rising clock edge. |
↑ |
H |
H |
Shift Right (Serial Input) |
Shifts data one position to the right, with new data entering at the serial input (SER). |
Occurs on each rising clock edge. |
Table 2: 74LS164 Sequential Logic Circuit Combination
This can be understood with the following information:
CP (Clock Pulse) = It controls the timing of data transfer and operations.
DSM (Data Strobe Master) = It enables parallel data loading when low.
MR (Master Reset)= It asynchronously clears the register when low.
X = It is the "don't care" condition, which means the input can be either high or low without affecting the operation.
↑ = It represents a rising clock edge.
↓= It represents a falling clock edge.
The internal structure of any IC is much more complex than the connection diagram because ICs consist of a combination of different logic gates. Here is the logic diagram that displays the internal structure of the 74LS164:
Figure 3: 74LS164 Logic Diagram
Here, you can see how the basic logic gates combine to form the 74LS164.
The operations and the clock shifting of the 74LS164 are understood with the following diagram.
Figure 4: 75LS164 Timing Diagram
This is a general representation of the timing diagram that can be understood with the help of the following points:
The rising edge clock pulse signal (CP) results in the shifting operation of the pulse.
When the parallel load phase is applied to the parallel inputs, it affects the content of the shift register.
The master reset signal clears the active low transition and clears the shift register asynchronously.
If you want to know more details about the datasheet for 74LS164, then you can visit this:
The general representation of the circuit diagram is important to understand when you are using it in practical work. Here is the diagram that clearly specifies the working and pin connections of this IC.
Figure 5: Circuit diagram of 74LS164
The 74LS164 has a pin named MR, which is a low active input master reset pin. The output of this pin remains in a low state until the state of the circuit is low. In such conditions, the values on the input do not affect its state.
The MR pin is also referred to as the reset or clear mode pin.
The procedure of the circuit’s working is completed only when the output of the MR pin is set high.
This IC has two serial input pins for all the functions. These pins are responsible for the versatility of this IC.
In order to ignore any unintentional input signal, any unused input is set to high.
In the event that the clock transition is set from low to high, the data in the IC is moved to one place on the right. The AND operation of the input pins A and B determines the new value of the right-most bit, Q0.
Before ordering or testing this IC, a good practice is to learn how it works in the simulator. I am presenting a simple circuit of the 74LS164 IC in Porteus ISIS. The following are its details:
74LS164 IC
LEDs
SW-SPDR (switch)
Power terminal
Ground terminal
Clock pulse
Open the Proteus software.
Go to the pick library “P” option and choose the first three components one by one by typing their names and double-clicking on them.
Arrange these components on the screen.
Connect the components using the wire connections.
Go to terminal mode from the left side of the screen and attach ground, power, and clock terminals on the required sites.
The circuit should look like the following image:
Figure 6: Proteus Simulation of 74LA123
The connections must be created cleanly and clearly to ensure the right output.
Click on the play button presented on the left side of the screen to start the simulation.
Once the project is complete, you will see the following points:
The circuit does not show any output on the LEDs when the circuit is played. At this point, the LM317 does not get any input.
Once the negative input is provided to the switch, the LEDs start showing the output one after the other. This shows the logic HIGH on the bits after the regular interval.
Figure 7: output of 64LS164 circuit with a switch on the negative side
Now, use the switch to provide the positive bit to the circuit, and the output on the LEDs will be shifted to the right.
Figure 8: 74LS164 output when the plus side of the switch is on
As a result, the LEDs will show the LOW output one after the other and in the end, it will show the LOW output at every LED.
If you want to test the circuit by yourself, download the simulation from the link given here:
74LS164 working Porteus Simulation
The basic features and specifications of the 74LS164 are given next:
Characteristic |
Value |
Description |
Operating Voltage |
3V - 18V |
Range of input voltage for proper operation |
Maximum Supply Voltage |
5.25 V |
The absolute maximum voltage that can be applied to the device |
Propagation Delay Time |
25 ns |
Time for a signal to travel through the device's internal circuitry |
Maximum Clock Frequency |
36 MHz |
The highest clock rate at which the device can reliably function |
Operating Temperature Range |
0°C to +70°C |
Environmental temperature range for reliable operation |
Clock Buffering |
Fully Buffered |
Internal clock buffering for improved signal integrity and noise immunity |
Available Packages |
16-pin PDIP, GDIP, and PDSO |
Different physical package options for PCB mounting |
Logic Family |
74LS (Low-power Schottky) |
A specific logic family with tradeoffs in speed and power consumption |
Power Consumption |
(Typical) 75 mW |
Average power is drawn during operation |
Output Current |
15 mA |
The maximum current that can be sourced or sunk by the outputs |
Fan-out |
10 LS-TTL Loads |
The number of logic gates that can be driven by a single output |
Input Threshold Voltage |
1.3 V |
Minimum input voltage level to reliably recognize a logic high |
Table 3: Features and Specifications of 74LS164
Just like other integrated circuits, the physical dimensions of the 74LS164 are also described in two units:
The metric dimensions are those in which the units used are the following:
Millimetres (mm)
Centimeters (cm)
Meters
Kilograms
Seconds
On the other hand, imperial units are those where the used units are the following:
Inches
Feet
Pounds
The dimensions of 74LS164 are given in the table:
Dimension |
Metric (mm) |
Imperial (inches) |
Length |
19.30 ± 0.30 |
0.760 ± 0.012 |
Width |
6.35 ± 0.25 |
0.250 ± 0.010 |
Height |
3.94 ± 0.25 |
0.155 ± 0.010 |
Pin spacing |
2.54 ± 0.10 |
0.100 ± 0.004 |
Table 4: Physical dimensions of the 74LS164
As mentioned before, the 74LS164 is a versatile register IC. It has multiple applications mentioned here:
The feature of the 74LS164 to store memory temporarily is useful in applications like the arithmetic logic register. Moreover, on the same device, it also shifts the data within the arithmetic logic register. Here, the main purpose of using 74LS164 is to use serial or parallel data handling.
The sequence generator requires the shifting and storing of the bit values. This can easily be done with the 74LS164 IC.
74LS164 is part of a large digital circuit. In digital up and down counters, this IC has applications because it has a sequential counting feature and when clock pulses are applied, it can decrement the values accordingly.
The basic feature of this IC is the serial to parallel output conversion. This feature makes it ideal for the circuit such as parallel to the serial output and vice versa.
So, in this article, we study the 74LS164 register IC in detail. We started with the basic introduction and then saw the details of the datasheet. There, we saw circuit diagrams, truth tables, logical circuits, and other related features to understand the basics of this IC. After that, we learned the working principle so that we could use it in the proteus simulation. Once we saw the results of the simulation, we studied the features and specifications of this IC, and in the end, we saw the applications of 74LS164. I hope we covered all the points but if something is missing, you can suggest it in the comment section.
Hello students! Welcome to another tutorial on the integrated circuit in Proteus. Different integrated circuits are revolutionizing the electronic world and today we are discussing one of them. The core topic of this tutorial is the 74LS160 IC in the proteus but before that, we’ll understand the basics of this IC.
In this article, we’ll start learning the 74LS160 from scratch. We’ll see its introduction and datasheet in detail. You will see the truth table, logic diagram, and pinouts of this IC in detail, and then we’ll move on to the basic features of this IC. You will see the simulation of 74LS160 in Proteus and in the end, we’ll go through some important applications of this IC. Let’s move towards the introduction first.
Figure 1: Top view of 74LS160 IC
74LS160 is an integrated circuit (IC) that is used as a counter in digital electronics.
It is a 4-bit binary synchronous counting device.
It belongs to the family of the 74xx series of ICs and the letters LS indicate that these belong to the low-power Schottky series.
This IC is made with the transistor transistor logic (TTL) technology.
It is an edge-triggered and cascadable MSI building block for multiple purposes, such as counting, memory addressing, frequency division, etc.
Moreover, it is widely used in digital circuits because it is presettable; that is, it can be used as the initial counter.
A feature of this series is that it has an asynchronous Master Reset (Clear) input that acts as an independent input, and the cock or other inputs do not control it.
Before using any digital IC, it is important to understand its structure and datasheet. The details given below will help you understand the workings of this IC:
The 74LS160 is 16 in IC and here is its connection diagram, DIP:
Figure 2: Pinout configuration of 74LS160
You can see that each pin has a name and number associated with it. The details of each pin can be seen in the table given next:
Symbol |
Name |
Description |
PE |
Parallel Enable (Active LOW) Input |
Enables parallel loading of data into the counter |
P0–P3 |
Parallel Inputs |
Four parallel data inputs for loading the counter |
CEP |
Count Enable Parallel Input |
Enables counting when asserted (Active LOW) |
CET |
Count Enable Trickle Input |
Enables counting when asserted (Active LOW) |
CP |
Clock (Active HIGH Going Edge) Input |
Clock input for synchronous counting (Active on rising edge) |
MR |
Master Reset (Active LOW) Input |
Resets the counter to 0 when asserted (Active LOW) |
SR |
Synchronous Reset (Active LOW) Input |
Resets the counter synchronously (Active LOW) |
Q0–Q3 |
Parallel Outputs (Note b) |
Four parallel binary outputs represent the count |
TC |
Terminal Count Output (Note b) |
Indicates when the counter reaches its maximum count |
Table 1: Pinout configuration of 74LS160
In different cases, when the 74LS160 is shown with the logic symbol given here:
Figure 3: Logic Symbol of 74LS160
Here, pin 16 is used for the power input and pin 8 is used as the ground. The names and numbers of the pins are the same as given before in the form of the table.
The truth table of this IC will help you understand the output of 74LS160 when the specific combination of inputs is fed into it. But before this, it is important to understand the following denotations in the table:
X = Don't-care condition
L = Logic low or ground
H = Logic high or positive voltage
CEP = Count Enable Parallel Input
CET = Count Enable Trickle Input
CP = Clock (Active HIGH Going Edge) Input
MR = Master Reset (Active LOW) Input
SR = Synchronous Reset (Active LOW) Input
CEP |
CET |
CP |
MR |
SR |
Mode |
X |
X |
X |
H |
X |
Load data (P0-P3) |
L |
H |
X |
X |
X |
Enable parallel load |
H |
L |
X |
X |
X |
Enable count (normal) |
H |
H |
L |
X |
X |
Enable count (trickle) |
H |
H |
H |
L |
X |
Reset (clear) counter |
H |
H |
H |
H |
L |
Synchronous reset |
H |
H |
H |
H |
H |
Load data (P0-P3) |
Table 2: Truth table of 74LS160
The working principle of 74LS160 can be understood with the help of some important points about its internal structure. The basis of its working principle is to understand that when the clock pulse is applied to the 74LS160, it responds to it and counts the binary values. Here are the important points to understand this:
Since the beginning, we have been mentioning that it is a 4-bit counter. It means it can count from 0000 to 1111 in binary numbers.
As with other integrated circuits, the counter responds to the clock pulse applied to its clock input. The rise in the clock input stimulates the counter operations.
The parallel load inputs are denoted by P0 to P3. The counter allows the parallel loading of the data when the appropriate pattern of signals is applied at the input pins.
Cascading is the process in which two or more integrated circuits are connected with each other in such a way that the output of one circuit becomes the input of the other. This is done to enhance the working ability of the system or is crucial when higher calculations are required using the counter.
The 74LS160 allows the cascading process. In this case, the ripple carry output (RCO) is connected with the clock input of the next counter.
Now, it is better to understand how to create the circuit of this IC in the Porteus simulator before using it in the circuit. Here is the way to create the circuit:
74LS160
Switch
LED
Clock
Ground
Power
Fire up the proteus software.
Choose the first three components from the list given above.
Place them in the working area to create the circuit.
Now, go to terminal mode from the left side of the screen and choose ground terminal. Place it in the respected area.
Repeat the above step for the power terminal.
Now go to generation mode and choose the Dclock.
Place the clock on pin 2 of IC.
Connect the component through the connecting wires.
The circuit must look like the image given here:
Figure 4: Proteus Circuit for 74LS160
The circuit is now ready to work. Click on the play button to start the working of the circuit.
The switches are used to provide the input signal to the circuit. When the switch is on, the input signal to the respective pin is HIGH, otherwise low.
At the start, the LEDs are working in a particular manner that the output is on all the pins in a particular pattern.
Figure 4: Changing the input of the 74LS160 circuit
Change the input through the switches and you will observe the change in the output.
You will observe a change in the values of output when the signal on the input signals is changed.
Figure 5: Getting the output of the 74LS160 Circuit simulation
The inputs and outputs are the same as given in the truth table.
If you want to have the design of the Proteus project I am using, then you can download it through the link given next:
Proteus simulation for the basic working of 74LS160
The 74LS160 has different modes and studying all of these will help you to understand the features and specifications.
On reaching the clock edge, a pulse propagates that stimulates the counter to work.
The master-slave FF is the pulse that triggers the master-slave flip-flop structure of this IC. The state of the internal logic circuit is changed according to the structure of the IC. The details of these inputs are given in the table given before.
The logic gates of flip-flops determine the output of the IC. Usually, the output depends on the following factors:
The current state of the pins
Previous inputs of pins
Feedback connections.
In some versions, 75LS160 has the decade working, which means these can provide values between 0 and 9.
The state of the master flip flop is transferred to the corresponding slave flip flop after some time. This is done to provide a stable and more synchronized output.
During the processing, the low signals on the load input activate the logic path of the IC.
All the values in the data inputs are transferred directly to the respective flip-flops.
The process of overriding the current counter bypasses the internal counter logic. It also sets the counter’s desired initial values and this is done by presetting the counter.
The reset pin is the active low pin, which means the output is reset when this pin has a zero value.
The clearing of the flip flop is the situation when all the FFs are forced to reset their values, no matter what the values on their inputs or what the values of the clock are.
The logic gates in the structure of the integrated circuit determine the internal structure of the flip flops. These are particularly useful for the transition from 1001 to 0000, which is 9 to 0 in the decimal numbers.
When the transition of the carry-out goes high, it indicates that the count cycle is complete.
The carryout pulse can be used in the cascading counter to enhance the working ability of the circuit using 74LS160.
If you want to use the 74LS160 in your circuits, you must know the physical dimensions of this IC. There are two basic units to measure the physical dimensions of devices like ICs:
In the metric package, only metric units are used to represent the calculations. The following are some of the basic units in this system:
Millimetres (mm)
Centimeters (cm)
Meters
Kilograms
Seconds
Usually, in the representation of the physical dimensions of the ICs, like 74LS160, millimeters are used for metric packages.
The imperial units are also known as the British imperial units. The popular units in the imperial packages are:
Inches
Feet
Pounds
The physical dimensions of the ICs in the imperial package are mostly inches. Here is the table that clearly shows the physical calculations of the 74LS160 IC:
Dimension |
Metric (mm) |
Imperial (inches) |
Length |
19.30 ± 0.30 |
0.760 ± 0.012 |
Width |
6.35 ± 0.25 |
0.250 ± 0.010 |
Height |
3.94 ± 0.25 |
0.155 ± 0.010 |
Pin spacing |
2.54 ± 0.10 |
0.100 ± 0.004 |
Table 3: Physical dimensions of 74LS160
The following are some prime applications where the 74LS160 is extensively used:
The most common example of the application of this IC is to use it as a digital counter. When the clock pulse is applied to this IC, it represents the binary counting values. This is not only used as it is but usually other logic gates are combined with it to get the complex calculator to work.
The frequency divider is the circuit that is designed to determine the value of frequency after dividing it by the power of 2. This circuit is incomplete without the 74LS160 IC.
This IC is incorporated into the time circuits, where its main job is to generate a time delay. Moreover, it also triggers specific events based on certain conditions. These conditions are set during the design process of the circuit.
In the sequential logic, the 74LS160 is used as the counter. The output of this IC is used as the input of some other devices and this creates the basis of the sequential logic circuits.
Signal processing is an important field where complex circuits are used. This IC is used in devices for signal processing where counting and timing functions are required.
Hence, today, we have seen the details of the 74LS160 Integrated Circuit. We started with the basic introduction of this IC and understood the structure and output of every pin through its datasheet. Through the logic diagram, logic circuit, truth table, and the pinouts of this IC we understood the details of its functionalities. Moreover, we saw its basic features and mode of operation. The physical dimensions of this IC made clear the domains of its usage in different circuits. We saw the simulation of the 74LS160 in the proteus and in the end, we shed light on different applications where the 74LS160 plays a vital role. I hope you have understood all the information but if you feel something missing or have any questions, you can ask us.
Hello pupils! Welcome to the next section of neural network training. We have been studying modern neural networks in detail, and today we are moving towards the next neural network, which is the Echo State Network (ESN). It is a type of recurrent neural network and is famous because of its simplicity and effectiveness.
In this tutorial, we’ll start learning with the basic introduction of echo state networks. After that, we’ll see the basic concepts that will help us to understand the work of these networks. Just after this, we’ll see the steps involved in setting the ESNs. In the end, we’ll see te fields where ESNs are extensively used. Let’s start with the first topic:
The echo state networks (ESNs) are a famous type of reservoir computer that uses recurrent neural networks for their functionalities. These are modern neural networks; therefore, their working is different from the traditional neural networks. During the training process, this does not rely on the randomly configured "reservoir" of neurons instead of backpropagation, as we observe in traditional neural networks. In this way, they provide faster and better performance.
The connectivity of the hidden neurons and their weights are fixed and these are assigned randomly. This helps it provide temporal patterns. These networks have applications in signal processing and time-series prediction.
Before going into detail about how it works, there is a need to clarify the basic concepts of this network. This not only clarifies the discussion of the work but will also clarify the basic introduction. Here are the important points to understand here:
The basic feature of ESN is the presence of the concept of computing reservoir. This is a hidden layer that has randomly distributed neurons. This random distribution makes sure that the input data is captured by the network effectively and does not overfit the specific pattern as is done in some other neural networks. In simple words, the reservoirs are known as the randomly connected recurrent network because of their structure. These reservoirs are not trained but play their role randomly in the computing process.
ESNs are members of a family of recurrent neural networks. The working of ESNs is similar to RNN but there are some distinctions as well. Let us discuss both:
Now, here are some differences between these two:
The difference between the training approaches of both of these is given here:
The ESN has a special property known as echo state property or ESP. According to this, the dynamics of the reservoirs are set in such a way that they have the fading memory of the past inputs. That means the structure of these neural networks must be created in such a way that it pays more attention to the new input concerning the memory. As a result, the old inputs will fade from memory with time. This makes it lightweight and simple.
In ESNs, the reservoir’s neurons have a non-linear activation function; therefore, these can deal with complex and nonlinear input data. As mentioned before, the ESNs employ fixed reservoirs that help them develop dynamic and computational capabilities.
Not only the structure, but the working of the ESNs is also different from that of traditional neural networks. There are several key steps for the working of the ESNs. Here is the detail of each step:
In the first step, the initialization of the network is carried out. As we mentioned before, there are three basic types of layers in this network, named:
This step is responsible for setting up the structure of the network with these layers. This also involves the assignment of the random values to the neuron weights. The internal dynamics of the reservoir layers evolve as more data is collected in these layers.
The echo state property of ESNs makes them unique among the other neural networks. Multiple calculations are carried out in the layers of the ESNs, and because of this property, the network responds to the newer inputs quickly and stores them in memory. Over time, the previous responses are faded out of memory to make room for the new inputs.
In each step, the echo state network gets the input vector from the external environment for the calculation. The information from the input vector is fed into both the input layer and the reservoir layer every time. This is essential for the working of the network.
This is the point where the working of the reservoir dynamic starts. The reservoir layer has randomly connected neurons with fixed weights, and it starts processing the data through the neurons. Here, the activation function starts, and it is applied to the dynamics of the reservoir.
In ESNs, the internal state of the reservoir layer is updated with time. These layers learn from the input signals. The ESNs have dynamic memory that continuously updates the memory with the update in the input sequence. In this way, the internal state is updated all the time.
One of the features of ESNs is their simplicity of the training process. Unlike traditional neural networks, the ESNs train only the connection of the reservoirs with the output layer. The weights are not updated in this case but these remain constant throughout the training process.
Usually, a linear algorithm, such as linear regression, is applied to the output layer. This process is called teacher forcing.
In this step, the output layer gets information from the input and reservoir layers. The output of both of these becomes the input of the output layer. As a result, the output is obtained based on the current time step of the reservoir layer.
The ESNs are designed to be trained for the specific tasks such as:
The ESNs are designed to learn from the relationship between the input sequence and the corresponding outputs. This helps it to learn in a comparatively simpler way.
The above structure of the ESN helps them a lot to have better performance than many other neural networks. Some important points that highlight the advantage are given here:
The structure of the ESNs clearly shows that these can learn quickly and more efficiently. The fixed reservoir weights allow it to learn at a rapid rate and the structure is also comparatively less expensive.
The ESNs do not have the vanishing gradient because of the fixed reservoirs. This allows them to work in the long-term dependencies in the sequential data. The presence of this vanishing gradient in other learning algorithms makes them slow.
The ESNs are robust to the noise because of the reservoir layer. The structure is designed in such a way that these have better generalization of the unseen input data. This makes the structure easy and simple and avoids the noise at different steps.
The simple and well-organized structure of ESN allows it to work more effectively and show flexibility in working as well as in the structure. These can adopt the various tasks and data types throughout their work and training.
Businesses and other fields are now adopting neural networks in their work so that they can get efficient working automatically. Here are some important fields where echo state networks are extensively used:
The ESNs are effective in learning from the data for time series prediction. Their structure allows them to effectively predict by utilizing the time series data; therefore, it is used in the fields like:
The signal processing and their analysis can be done with the help of the echo state networks. This is because these can capture the temporal pattern and dependencies in the signal. This is helpful in fields like:
These procedures are used for different purposes where the signal plays an important role.
There are different reservoir computing research centers where ESNs are widely used. These departments focus on the exploration of the capabilities of reservoir networks such as ESNs. Here, the ESNs are extensively used as a tool for studying the structure and working of recurrent neural networks.
The ESNs are employed to understand aspects of human cognition such as learning and memory. For this, they are used in cognitive modeling. They play a vital role in understanding and implementing the complex behaviors of humans. For this, they are implemented in dynamic systems.
An important field where ESNs are applied is the control system. Here, these are considered ideal because of their temporal dependencies. These learn from the control dynamic processes and have multiple applications like process control, adaptive control, etc.
The ESN is an effective tool for time series classification. Here, the major duty of ESN is to classify the sequence data into different groups and subgroups. This makes it useful in fields like gesture recognition, where pattern recognition for movement over time is important.
Multiple neural networks are used in the field of speech recognition and ESN is one of them. The echo state network can learn from the pattern of the speech of the person and as a result, they can recognize the speaking style and other features of that voice. Moreover, the temporal nature of this network makes it ideal for capturing phonetic and linguistic features.
The temporal dependencies of the ESN also make it suitable for fields like robotics. Some important tasks in robotics where temporal dependencies are used are robot control and learning sequential motor skills. Such tasks are helpful for robotics to adapt to the changes in the environment and learn from previous experience.
The ESNs are used in natural language processing tasks such as language modeling, sentiment analysis, etc. Here, the textual data is used to get the temporal dependencies.
Hence, we have learned a lot about the echo state networks. We started with the basic introduction of the ESNs. After that, we saw the basic concepts of the ESNs and their connection with the recurrent neural network. We understood the steps to implement the ESNs in detail. After that, when all the basic concepts were clear, we saw the applications of ESNs with the points that make them ideal for a particular field. I hope the echo state networks are clear to you now. If you have any questions, you can contact us.
Hello learners! Welcome to the next episode of Neural Networks. Today, we are learning about a neural network architecture named Vision Transformer, or ViT. It is specially designed for image classification. Neural networks have been the trending topic in deep learning in the last decade and it seems that the studies and application of these networks are going to continue because they are now used even in daily life. The role of neural network architecture in this regard is important.
In this session, we will start our study with the introduction of the Vision Transformer. We’ll see how it works and for this, we’ll see the step-by-step introduction of each point about the vision transformer. After that, we’ll move towards the difference between ViT and CNN and in the end, we’ll discuss the applications of vision transformers. If you want to know all of these then let’s start reading.
The vision transformer is a type of neural network architecture that is designed for the field of image recognition. It is the latest achievement in deep learning and it has revolutionized image processing and recognition. This architecture has challenged the dominance of convolutional neural networks (CNN), which is a great success because we know that CNN has been the standard in image recognition systems.
The ViT works in the following way:
It divides the images into patches of fixed-size
Employs the transformer-like architecture on them
Each patch is linearly embedded
Position embeddings are added to the patches
A sequence of vectors is created, which is then fed into the transformer encoder
We will talk more about how it works, but let’s look at how ViT was introduced in a market to understand its importance in image recognition.
The vision transformer was introduced in a paper in 2020 titled “An Image is Worth 16x16 Words: Transformers for Image Recognition at Scale.” This paper was written by different researchers, including Alexey Dosovitskiy, Lucas Beyer, and Alexander Kolesnikov, and was presented at the conference on Neural Information Processing Systems (NeurIPS). This paper has different key concepts, including:
Image Tokenization
Transformer Encoder for Images
Positional Embeddings
Scalability
Comparison with CNNs
Pre-training and Fine-tuning
Some of these features will be discussed in this article.
The vision transformer is one of the latest architectures but it has dominated other techniques because of its remarkable performance. Here are some features that make it unique, among others:
ViT uses the transform architecture for the implementation of its work. We know that transformer architecture is based on the self-attention mechanism; therefore, it can capture information about the different parts of the sequence input. The basic working of Vi is to divide the images into patches, so after that, the transformer architecture helps to get the information from different patches of the image.
This is an important feature of ViT that allows it to extract and represent global information effectively. This information is extracted from the patches made during the implementation of ViT.
The classification token is considered a placeholder in the whole sequence created through the patch embeddings. The main purpose of the classification token is to act as the central point of all the patches. Here, the information from these patches is connected in the form of a single vector of the image.
The classification token is used with the sel-attention mechanism in the transformer encoder. This is the point where each patch interacts with the classification token and as a result, it gathers information about the image.
The classification token helps in the gathering of the final image after getting the information from the encoder layers.
The vision transformer architecture has the ability to train large datasets, which makes it more useful and efficient. The ViT is pre-trained on large sets such as ImageNet, which helps it learn from the general features of the images. Once it is fully trained, the training process using the small dataset is performed on it to get it working on the targeted domains.
One of the best features of ViT is its scalability, which makes it a perfect choice for image recognition. When the resolution of the images increases during the training process, the architecture does not change. The ViT has the working mechanisms to work in such scenarios. This makes it possible to work on high-resolution images and provide fine-grained information about them.
Now that we know the basic terms and working style of vision transformers, we can move forward with the step-by-step process of how vision transform architecture works. Here are these steps:
The first step in the vision transformer is to get the input image and divide it into non-overlapping patches of a fixed size. This is called image tokenization and here, each patch is called a token. When reconnected together, these patches can create the original input image. This step provides the basis for the next steps.
Till now, the information in the ViT is in pictorial format. Now, each patch is embedded with a vector to convert the information into a transformer-compatible format. This helps with smooth and effective working.
The next step is to assign the patches all spatial information and for this, positional embeddings are required. These are added to the token embeddings and help the model understand the position of all the patches of images.
These embeddings are an important part of ViT because, in this case, the spatial relationship among the image pixels is not inherently present. This step allows the model to understand the detailed information in the input.
Once the above steps are complete, the tokenized and embedded image patches are then passed to the transformer encoder for processing. It consists of multiple layers and each of them has a self-attention mechanism and feed forward neural network.
Here, the self-attention mechanism is able to capture the relationship between the different parts of the input. As a result, it takes the following features into consideration:
The global context of the image
Long dependencies of the image
As we have discussed before, the classification head has information on all the patches. It is a central point that gets information from all other parts and it represents the entire image. This information is fed into the linear classifier to get the class labels. At the end of this step, the information from all the parts of the image is now present for further action.
The vision transformers are pre-trained on large data sets, which not only makes the training process easy but also more efficient. Here are two phases of training for ViT:
The pre-training process is where large datasets are used. Here, the model learns the basic features of the images.
The fine-tuning process in which the small and related dataset is used to train the model on the specific features.
This step also involves the self-attention mechanism. Here, the model is now able to get all the information about the relationship among the token pairs of the images. In this way, it better captures the long dependencies and gets information about the global context.
All these steps are important in the process and the training process is incomplete without any of them.
The importance and features of the vision transformer can be understood by comparing it with the convolutional neural network. CNNs are one of the most effective and useful neural networks for image recognition and related tasks but with the introduction of a vision transformer, CNNs are considered less useful. Here are the key differences between these two:
The core difference between ViT and CNN is the way they adopt feature extraction. The ViT utilizes the self-attention mechanism for feature extraction. This helps it identify long-range dependencies. Here, the relationship between the patches is understood more efficiently and information on the global context is also known in a better way.
In CNN, feature extraction is done with the help of convolutional filters. These filters are applied to the small overlapping regions of the images and local features are successfully extracted. All the local textures and patterns are obtained in this way.
The ViT uses a transformer-based architecture, which is similar to natural language processing. As mentioned before, the ViT has the following:
Encoder with multiple self-attention layers and a final classifier head. These multiple layers allow the ViT to provide better performance.
CNN uses a feed-forward architecture and the main components of the networks are:
Convolutional layers
Pooling layers
Activation functions
Both of these have some important points that must be kept in mind when choosing them. Here are the positive points of both of these:
The ViT has the following features that make it useful:
Vit can handle global context effectively
It is less sensitive to image size and resolution
It is efficient for parallel processing, making it fast
CNN, on the other hand, has some features that ViT lacks, such as:
It learns local features efficiently
It has the explicit nature of filters so it shows Interpretability
It is well-established and computationally efficient
So all these were the basic differences, the following table will allow you to compare both of these side by side:
Feature |
Convolutional Neural Network |
Vision Transformer |
Feature Extraction |
Convolutional filters |
Self-attention mechanism |
Architecture |
Feedforward |
Transformer-based |
Strengths |
Local features Interpretability Computational efficiency |
Global context Less sensitive to image size Parallel processing |
Weaknesses |
Long-range dependencies Image size and resolution Filter design |
More computational resources' interpretability Small images |
Applications |
Image classification Object detection Image recognition Video recognition Medical imaging |
Image classification Object detection Image segmentation |
Current Trends |
N/A |
Increasing popularity ViT and CNN combinations Interpretability and efficiency improvements |
The introduction of the ViT is not old and it has already been implemented in different fields. Here is the overview of some applications of the ViT where it is currently used:
The most common and prominent use of ViT is in image classification. It has provided remarkable performance with datasets like ImageNet and CIFAR-100. The vision transformer has classified the images into different groups that provide the user with a guarantee of their best performance.
The pre-training process of the vision transformer has allowed it to perform object detection in the images. This network is trained specially to detect objects from large datasets. It does it with the help of an additional detection head that makes it able to predict bounding boxes and confidence scores for the required objects from the images.
The images can be classified into different groups using the vision transformer. It provides a pixel-level prediction that allows it to make decisions in great detail. This makes it suitable for applications such as medical imaging and autonomous driving.
The vision transformer is used for the generation of realistic images using the existing data sets. This is useful for applications such as image editing, content creation, artistic exploration, etc.
Hence, we have read a lot about the vision transformer neural network architecture. We have started with the basic introduction, where we see the core concepts and the flow of the vision transformer’s work. After that, we saw the details of the steps that are used in ViT and then we compared it with CNN to understand why it is considered better than CNN in many aspects. In the end, we have seen the applications of ViT to understand its scope. I hope you liked the content and if you are confused at any point, you can ask in the comment section.
Hello pupils! Welcome to the next session of the neural network series. I hope you are doing good. In the previous part of this series, I showed the double deep Q networks and discussed their differences from the deep Q network to make things clear. Today, I am going to visit a very popular neural network with you. This is the spiking neural network that mimics the functionality of the biological neurons with the help of spikes. This is a different neural network than the traditional networks and you will see the details of each point.
In this lecture, we’ll understand the introduction of the spiking neural network. We’ll discuss all the basic terms that are used while studying the SNN. After that, we’ll move on to the steps of using SNN in detail. In the end, we’ll move towards the applications of the SNN and understand how its similar structure to the brain helps to improve different applications.
The spiking neural networks (SNN) show a unique and inspiring neural network approach that is a perfect combination of deep learning neural networks, biological structure, and computational neuroscience. For their performance, the SNN uses spikes or pulses of electrical conductivity to communicate the information from one place to another. It is defined as:
"The spiking neural networks (SNN) are deep learning artificial neural networks that are inspired by biological structure and mechanisms and work with the help of discrete and precisely designed events known as spikes."
In traditional neural networks, continuous values are used to represent the activation functions but here, the continuous values are smooth and easy to implement with better performance.
The last decade has witnessed the seamless applications and features of artificial neural networks. But the history of these networks is older than this. The spiking neural networks can be traced back to the early neural networks. Here are some important highlights of the introduction and growth of SNN:
In 1952, Alan Hodgkin and Andrew Huxley were the first to publish their thoughts in research about squid giant axons’s action potential. This helped others understand the biophysical basis and this was the foundation for the idea of spiking.
In the same decade, Warren McCulloch and Walter Pitts presented the McCulloch-Pitts neuron, which is the first mathematical neuron model. This model is the foundation of early artificial neural networks. It utilizes the binary activation values.
In the 1960s, Frank Rosenblatt was successful in developing the perceptrons. It is a single-layer artificial neural network that is able to perform simple and basic tasks. This was first appreciated well but after that, people started criticizing it because it was useful on a very small level.
In 1970, Bernard Widrow and Ted Hoff presented Adaptive Linear Neuron (ADALINE). It is also a single-layer neural network but it works on continuously valued activation functions. Other people worked more on its improvements and as a result, better networks and outputs were seen during this time.
In the 2000s, research was performed on the neurons and this gave rise to mimicking structure in SNN. It resulted in the interest of other scientists in these techniques and the work on the spikings was boosted. This was the time when new algorithms and techniques were introduced for the SNN, and the improved performance not only showed more interest among the people but also broadened the domains of the SNN.
Currently, SNN is being used in different fields such as robotics, healthcare, artificial intelligence, etc. You will see the details of applications at the end of this article.
It's better to understand the basic concepts to understand the working principles and applications of SNN. These are the terms often used when dealing with spiking neural networks:
The spikes are the fundamental unit of communication in the spiking neural networks. These are also known as action potentials and are the brief pulses of electrical activity.
A spike is a sudden, rapid, and transient change that represents the output of the neuron.
These are in the form of firing neurons and are responsible for the transition of the neurons in the whole network.
The SNN relies on the spikes for the transmission of the data. This point is different from the traditional neural network where continuous activation functions are required for this purpose.
The information on the spikes like the timing and frequency are important factors of the network.
If the spikes have a precise relative timing to each other then these can encode the temporal information. Hence the SNN capture the dynamic nature of the biological neural system.
Spikes also play a fundamental role in the computational capabilities. They have multiple features related to computational capabilities such as:
Temporal data more effectively
Handle the complex spatiotemporal pattern
Potentially operate in a more energy-efficient manner (as compared to traditional artificial neural networks)
The advancement in the spikes research is resulting in more powerful SNNs.
In biological neurons, the cell membrane is responsible for maintaining the difference between the intracellular and extracellular environments. A similar concept is also present in the membrane potential of the spiking neural networks. Usually, the membrane potential is different in both these environments.
The membrane potential is the key concept in SNN that describes the electric potential difference across the cell membrane.
This is the dynamic quantity therefore, it changes with time and determines if the neuron has to generate the spike or not.
The neuron in SNN has the threshold membrane potential (discussed below). If the potential is less than this, no change occurs in it, Otherwise, the spike is generated.
The threshold potential is a specific minimum voltage level that a neuron must reach to generate the action potential (spike). Hence, it can be considered as a border of potential values and this is described as:
If
Potential values Then Neuron does not produce a spike If Potential values>=threshold value Then Neuron produces spike In SNN, the synaptic Weight is the measure of the connection strength of two neurons. This has an effect on the influence of one neuron on the other. Strong synaptic weight means a more substantial effect on the receiving neuron. As a result, there are more chances of firing the spike because of the incoming signal from such a neuron. The opposite case is in the weak neuron. As the name suggests, the excitatory input of the SNN is the type of input signal that results in more firing of spikes. The excitatory input results in the following processes in SNN: The input results in the depolarization of the neuron The membrane potential increases because of depolarization The potential may reach the threshold potential value The result of this value can be in the firing of a spike The inhibitory input is the opposite of the excitatory input. This results in the inhibition of the firing of spikes. The following processes occur in neurons when inhibitory input is added: The inhibitory input results in the hyperpolarization of the neuron The overall membrane potential decreases The neuron moves far from the threshold potential value There are less chances of spike firing A better understanding of this concept will be achieved when you know the following terms: A presynaptic neuron is one that sends the signal to the other neuron. The neuron that receives the signal from the presynaptic neuron. A port synaptic potential is any change in the membrane potential caused by the presynaptic neuron. It is the combinational effect of the excitatory input and inhibitory input. The collective effect of both of these changes the values of the membrane potential and if it touches the threshold potential, it results in the spike generation and vice versa. Temporal coding is the process of encoding the information in the neuron of SNN. Temporal coding is a more reliable method in SNN because it does not just rely on the firing rate of spikes but it also involves the information of the occurrence of spikes. In this way, the more precise and detailed information of the data. The rate coding is another type of coding where the average timing of neuron firing is involved. It involves information on the average firing rate of spikes. Other related information such as spikes in frequency over a given time. It is a different coding method from the temporal coding. The synapses are an important concept in SNN and it is defined as: "The synapses in SNN are the specialized junctions between two neurons and these play a crucial role in the communication between these two." In synapses, the synaptic plasticity is their ability to change their strength according to the experience in the SNN. it is done by making changes in the weights of synapses and as a result, the connection is modified to a stronger or weaker force according to the case. This is an important feature to understand. Just like the biological learning principles, that move towards the optimization of the whole system according to environment, the learning process of SNN is intelligent enough to provide the best performance. It means the modification of the synaptic weights according to the current condition of the network. As a result, the system of SNN works to move towards stability and optimization according to the environment. Through the basic concepts of the spiking neural network, the working principle of the spiking neural network is clear to you. Now, there is a need to discuss the flow of all the processes occurring in SNN. The working in SNN is accomplished in five steps given next: The setting of input and Synaptic Weights Membrane Potential Update process Spike Generation in SNN Spike Propagation in SNN Learning and Plasticity for the final results in SNN Here are the details of each step that will be easy for you to understand: The first step is to initialize the neurons to create the network. Each neuron has its specific features such as membrane potential, threshold values, etc. The information of a specific neuron is based on the spikes. These have synaptic weights that determine the strength of the presynaptic neuron to the postsynaptic neuron. Once the network is arranged successfully according to the requirements, the firing of the spikes occurs. Here, when the presynaptic neuron generates spikes, it transmits the signals. There is an effect on the potential difference of postsynaptic neurons. The nature of synapses decides if the signal is an inhibitory input or an excitatory input (as discussed above). The membrane potential continuously updates throughout the whole process. The overall effect of both these inputs results in the final membrane potential of neurons at a specific point. The membrane potential has a specific threshold value. If the potential reaches this value, the postsynaptic neuron fires the spikes. The inhibitory and excitatory inputs collectively influence the timing of the spikes. Every neuron can encode information like spiking frequency, etc. The firing of spikes results in the propagation of the signal to the next neuron in the network. This process is continuous throughout the network and results in the influence of the signal on sending and receiving neurons. The propagation of the spikes occurs throughout the network and after some time, the weight of the neuron is modified in the process of synaptic plasticity. This process depends on the multiple values in neurons and it affects the learning process of the network. This not only helps in the growth and learning of the network but allows it to adopt new information and stimulate multiple processes throughout the network. Spiking neural networks are one of the most popular emerging techniques in deep learning. The working of these networks is different from that of traditional neural networks; therefore, they have a little bit different and complex applications. Here are some of the main domains where SNN is being used along with other neural networks but the output of the SNN is different from others: In neuromorphic computations, the SNN is used for the development of specialized hardware and software systems. These are the copies or mimicry of the structure and features of the human brain. These computing chips are used for different purposes where memory and related features are required. For instance, the SNN is used in neuromorphic chips that offer high processing speed and efficiency in energy usage. The SNN plays a role in areas where sensory information is required to get better output. For instance, in fields where vision or audio recognition is required for the output, SNN is used for better processing because these can work on the spatiotemporal patterns. As a result, SNN has major applications in speech, voice, and vision recognition systems. The spiking neural networks are used in the specialized cameras. These are called event-based cameras and are designed to capture the changes of the event in the frame, unlike traditional cameras. These cameras have applications such as: Object tracking Motion analysis Gesture recognition Motion detection There are different processes in the field of brain-computer interfaces that can be improved with the help of SNN. For instance, communication or control processes are made better using this neural network because it has the feature of temporal dynamics. This allows it to do better with spiking behaviours, just like the human brain. The brain-like working of SNN is suitable for cognitive modeling. Usually, the researchers use SNN to understand the functionality and working of the neural networks and learn how they deal with cognitive mechanisms and learning tasks. SNN can work on the temporal aspects that help them in processes like: Information processing Decision making Human cognition This helps to improve the functionality of the system. One of the important applications of SNN is in neuroprosthetics, where it is implemented on specialized hardware chips. These chips are designed to be used in processes like edge computation and processing using sensors. As a result, these present parallelism and efficiency. Hence, today we have seen the details of spiking neural networks. These are the modern networks that are based on a similar structure of the brain. We started with the basic definition of SNN and saw the core concept that helped us understand the flow of the spiking neural network. After that, we have seen the details of the application of SNN to understand that it is widely used in domains where human brain-like behavior is required. I hope you find this article useful. If you have any questions, you can ask them in the comment section.Synaptic Weight in Spike Neural Network
Excitatory Input in SNN
Inhibitory Input in SNN
Post-Synaptic Potential (PSP) in SNN
Temporal Coding in SNN
Rate Coding in SNN
Synaptic Plasticity
Learning in SNNs
Working of Spiking Neural Networks
Initialization of Neurons in SNN
Update in the Membrane Potential of SNN
Spike Generation in SNN
Spike Propagation in SNN
Learning and Plasticity for the final results in SNN
Applications of Spiking Neural Networks
Neuromorphic Computation with SNN
Sensory Processing Using SNN
Spiking Neural Networks in Event-based Cameras
Brain-Computer Interface (BCI) and SNN
Cognitive Modeling Process using SNN
Use of SNN in Neuroprosthetics
Hey pupils! Welcome to the next session on modern neural networks. We are studying the basic neural networks that are revolutionizing different domains of life. In the previous session, we read the Deep Q Networks (DQN) Reinforcement Learning (add link). There, the basic concepts and applications were discussed in detail. Today, we will move towards another neural network, which is an improvement in the deep Q network and is named the double deep Q network.
In this article, we will point towards the basic workings of DQN as well so I recommend you read the deep Q networks if you don’t have a grip on this topic. We will introduce the DDQN in detail and will know the basic needs for improvement in the deep Q network. After that, we’ll discuss the history of these networks and learn about the evolution of this process. In the end, we will see the details of each step in the double-deep Q network. The comparison between DQN and DDQN will be helpful for you to understand the basic concepts. This is going to be very informative so let’s start with our first topic.
The double deep Q network is the advanced form of the Dqqp Q Network (DQN). We know that DQN was the revolutionary approach in Atari 2600 games because it utilizes the deep learning algorithm to learn from the simple raw game input. As a result, it provides a super human-like performance in the games. Yet, in some situations, the overestimation was observed in the action’s value; therefore, a suboptimal situation is observed. After different research and feedback from the users, the Double Deep Q Learning method was introduced. The need for the double deep Q network will be understood by studying the history of the whole process.
The history of the double deep Q network is interwoven with the evolution process of deep reinforcement learning. Here is the step-by-step history of how the double deep Q network emerged from the DQN.
In 2013, a researcher from Google DeepMind named Volodymyr Mnih and the team published a paper in which they introduced deep networks. According to the paper, the Deep Q network (DQN) is a revolutionary network that combines neural networks and reinforcement learning together.
The DQN made an immediate impact on the game industry because it was so powerful that it could surpass all the human players. Different researchers moved towards this network and created different applications and algorithms related to it.
The DQN gained fame soon and attracted a large audience, but there were some limitations to this neural network. As discussed before, the overestimation bias of DQN was the problem in some cases that led the researchers to make improvements in the algorithm. The overestimation was in the case of action values and it resulted in slow convergence in some specific scenarios.
In 2015, a team of scientists introduced the Double Deep Q Network as an improvement of its first version. The highlighted names in this research are listed below:
Ziyu Zhang
Terrance Urban
Martin Wainwright
Shane Legg (from Deep Mind)
They have improved it by applying the decoupling of action selection and action evaluation processes. Moreover, they have paid attention to deep reinforcement learning and tried to provide more effective performance.
The DDQN was successful in providing a solid impact on different fields. The DQN was impactful on the Ataari 2600 games only but this version has applications in other domains of life as well. We will discuss the applications in detail soon in this article.
The details of evolution at every step can be examined through the table given here:
Event |
Date |
Description |
Deep Q-Networks (DQN) Introduction |
2013 |
|
DQN Limitations Identified |
Late 2010s |
|
Double Deep Q-Networks (DDQN) Proposed |
2015 |
To address DQN's overestimation bias, Ziyu Zhang, Terrance Urban, Martin Wainwright, and Shane Legg propose DDQN. |
DDQN Methodology |
2015 |
DDQN employs two Q-networks
It effectively reduces overestimation bias through decoupling. |
DDQN Evaluation |
2015-2016 |
|
DDQN Applications |
2016-Present |
DDQN's success paves the way for its application in various domains, including:
|
DDQN Legacy |
Ongoing |
DDQN's contributions have established deep reinforcement learning (DRL) as a powerful tool for solving complex decision-making problems in real-world applications. |
The working mechanism of the DDQN is divided into different steps. These are listed below:
Action Selection and Action Evaluation
Q value Estimation Process
Replay and Target Q-network Update
Main Q-network Update
Let’s find the details of each step:
The DDQN has improved its working because it combines the action selection and action evaluation processes. For this, the DDQN has to use two separate Q networks. Here are the details of this network:
The main Q network is responsible for the selection of the particular action that has the highest prediction Q value. This value is important because it is considered the expected future reward of the network for the particular state.
It is a copy of the main Q network and it is used to evaluate the Q values the main network predicts. In this way, the Q values are passed through two separate networks. The difference between the workings of these networks is that this network updates less frequently and makes the values more stable; therefore, these values are less overestimated.
The following steps are carried out in the Q value estimation selection:
The first step is searching for state representation. The agent works and gets the state representation from the environment. This is usually in the form of visual input or some numerical parameters that will be used for further processing.
This state representation move is fed into the main Q network as an input. As a result of different calculations, the output values for the possible action are shown.
Now, among all these values, the agent selects the one Q value from the main Q value that has the highest prediction.
The values in the previous step are not that efficient. To refine the results, the DDQN applies the experience replay. It uses reply memory and random sampling to store past data and update the Q networks. Here are the details of doing this:
First of all, the agent interacts with the environment and collects a stream of experiences. Each of the streams has the following information:
The current state of the network
Action taken
The reward received in the network
The next state of the network
The results obtained are stored in replay memory.
The random batch of values from the memory is sampled at regular intervals. In this way, the evaluation of the action's performance is updated for each experience. It is done to get the Q values of the actions.
The target Q network updates the whole system by providing the accumulative errors therefore, the main Q network gets frequent updates and as a result, better performance is seen. The main Q network gets continuously learns and this results in better Q value updates.
Both of these networks are widely used in different applications of life but the main purpose of this article is to provide the best information regarding the double deep Q networks. This can be understood by comparing it with its previous version which is a deep Q network. In research, the difference between the cumulative reward at periodic intervals is shown through the image given next:
Here is the comparison of these two on the basis of fundamental parameters that will allow you to understand the need of DDQN:
As discussed before, the basic point where these two networks are differentiated is the overestimation bias. Here is a short recap of how these two networks work with respect to this parameter:
The traditional DQN is susceptible to overestimation bias therefore, Q values are overestimated and result in suboptimal policies.
The double deep Q networks are designed to deal with the overestimation and provide an accurate estimation of Q values. The separate channels to deal with the action selection and evaluation help it to deal with the overestimation.
The presence of two networks not only helps in the overestimation but also in problems such as action selection and evaluation, Q value estimation, etc.
In DQN, the overestimation results in the instability of the results at different stages which can cause the convergence in the overall results.
To overcome this situation, in DDQN, a special mechanism helps to improve the stability and as a result, better convergence is seen.
The deep Q networks employ the target network for the purpose of training stabilisation. However these target networks are directly used for the action selection and evaluation therefore, it has less accuracy.
The issue is solved in DDQN because of the periodic updations and it is done with the parameter of the online network. As a result, a stable training process provides better output in DDQN.
The performance of DQN is appreciable in different fields of real life. The issue of overestimation causes errors in some cases. So, it has a remarkable performance as compared to different neural networks but less than the DDQN.
In DDQN, fewer errors are shown because of the better network structure and working principle.
Here is the table that will highlight all the points given above in just a glance:
Feature |
DQN |
DDQN |
Overestimation Bias |
Prone to overestimation bias |
Effectively reduces overestimation bias |
Stability and Convergence |
Less stable due to overestimation bias |
More stable due to target Q-network |
Target Network Update in Q Networks |
Direct use of target network for action selection and evaluation |
Periodic updates of the target network using online network parameters |
Overall Performance |
Remarkable performance but prone to errors due to overestimation |
Superior performance with fewer errors |
Additional Parameters |
N/A |
Reduced overestimation bias leads to more accurate Q-value estimates |
The applications of both these networks seem alike but the basic difference is the performance and accuracy.
Hence, the double deep Q network is an improvement over the deep Q networks. The main difference between these two is that the DDQN has less overestimation of the action’s value. This makes it more suitable for different fields of life. We started with the basic introduction of the DDQN and then tried to compare it with the DQN so that you may understand the need for this improvement. After that, we read the details of the process carried out in DDQN from start to finish. In the end, we saw the details of the comparison between these two networks. I hope it was a helpful article for you. If you have any questions, you can ask them in the comment section.
Hello readers! Welcome to the next episode of the Deep Learning Algorithm. We are studying modern neural networks and today we will see the details of a reinforcement learning algorithm named Deep Q networks or, in short, DQN. This is one of the popular modern neural networks that combines deep learning and the principles of Q learning and provides complex control policies.
Today, we are studying the basic introduction of deep Q Networks. For this, we have to understand the basic concepts that are reinforcement learning and Q learning. After that, we’ll understand how these two collectively are used in an effective neural network. In the end, we’ll discuss how DQN is extensively used in different fields of daily life. Let’s start with the basic concepts.
Unlike this learning, supervised learning is done with the help of labeled data. Here are some important components of the reinforcement learning method that will help you understand the workings of deep Q networks:
Fundamental Components of Reinforcement Learning |
|
Name of Component |
Detail |
Agent |
An agent is a software program, robot, human, or any other entity that learns and makes decisions within the environment. |
Environment |
In reinforcement, the environment is the closed world where the agent operates with other things within the environment through which the agent interacts and perceives. |
Action |
The decision or the movement the agent takes within the environment at the given state. |
State |
At any specific time, the complete set of all the information the agent has is called the state of the system. |
Reward |
|
Policy |
A policy is a strategy or mapping based on the states. The main purpose of reinforcement learning is to design policies that maximize the long-term reward of the agent. |
Value Function |
It is the expectation of future rewards for the agent from the given set of states. |
Q learning is a type of reinforcement learning algorithm that is denoted by Q(s,a). Here, here,
Q= Q learning function
s= state of the learning
a= action of the learning
This is called the action value function of the learning algorithm. The main purpose of Q learning is to find the optimal policy to maximize the expected cumulative reward. Here are the basic concepts of Q learning:
In Q learning, the agent and environment interaction is done through the state action pair. We defined the state and action in the previous section. The interaction between these two is important in the learning process in different ways.
The core update rule for Q learning is the Bellman equation. This updates the Q values iteratively on the basis of rewards received during the process. Moreover, future values are also estimated through this equation. The Bellman equation is given next:
Q(s,a)←(1−α)⋅Q(s,a)+α⋅[R(s,a)+γ⋅maxa′Q(s′,a′)]
Here,
γ = discount factor of the function which is used to balance between immediate and future rewards.
R(s, a) = immediate reward of taking the action “a” within the state “s”.
α= The learning rate that controls the step size of the update. It is always between 0 and maxa′Q(s′,a′) = The prediction of the maximum Q values over the next state s′ and action value a′
The deep Q networks are the type of neural networks that provide different models such as the simulation of video games by using the Q learning we have just discussed. These networks use reinforcement learning specifically for solving the problem through the mechanism in which the agent sequentially makes a decision and provides the maximum cumulative reward. This is a perfect combination of learning with the deep neural network that makes it efficient enough to deal with the high dimensional input space.
This is considered the off-policy temporal difference method because it considers the future rewards and updates the value function of the present state-action pair. It is considered a successful neural network because it can solve complex reinforcement problems efficiently.
The Deep Q network finds applications in different domains of life where the optimization of the results and decision-making is the basic step. Usually, the optimized outputs are obtained in this network therefore, it is used in different ways. Here are some highlighted applications of the Deep Q Networks:
The Atari 2600 games are also known as the Atari Video Computer System (VCS). It was released in 1977 and is a home video controller system. The Atari 2600 and Deep Q Network are two different types of fields and when connected together, they sparked a revolution in artificial intelligence.
The Deep Q network makes the Atari games and learns in different ways. Here are some of the ways in which DQN makes the Atari 2600 train ground:
Learning from pixels
Q learning with deep learning
Overcoming Sparse Rewards
Just like reinforcement learning, DQN is used in the field of robotics for the robotic control and manipulation of different processes.
It is used for learning specific processes in the robots such as:
Grasping the objects
Navigate to environments
Tool manipulation
The feature of DQN to handle the high dimensional sensory inputs makes it a good option in robotic training where these robots have to perceive and create interaction with their complex surrounding.
The DQN is used in autonomous vehicles through which the vehicles can make complex decisions even in a heavy traffic flow.
Different techniques used with the deep Q network in these vehicles allow them to perform basic tasks efficiently such as:
Navigation of the road
Decision-making in heavy traffic
Avoid the obstacles on the road
DQN can learn the policies from adaptive learning and consider various factors for better performance. In this way. It helps to provide a safe and intelligent vehicular system.
Just like other neural networks, the DQN is revolutionizing the medical health field. It assists the experts in different tasks and makes sure they get the perfect results. Some of such tasks where DQN is used are:
Medical diagnosis
Treatment optimization
Drug discovery
DQN can analyze the medical record history and help the doctors to have a more informed background of the patient and diseases.
It is used for the personalized treatment plans for the individual patients.
Deep Q learning helps with resource management with the help of policies learned through optimal resource management.
It is used in fields like energy management systems usually for renewable energy sources.
In video streaming, deep Q networks are used for a better experience. The agents of the Q network learn to adjust the video quality on the basis of different scenarios such as the network speed, type of network, user’s preference, etc.
Moreover, it can be applied in different fields of life where complex learning is required based on current and past situations to predict future outcomes. Some other examples are the implementation of deep Q learning in the educational system, supply chain management, finance, and related fields.
Hence in this way, we have learned the basic concepts of Deep Q learning. We started with some basic concepts that are helpful in understanding the introduction of the DQN. These included reinforcement learning and Q learning. After that, when we saw the introduction of the Deep Q network it was easy for us to understand the working. In the end, we saw the application of DQN in detail to understand its working. Now, I hope you know the basic introduction of DQN and if you want to know details of any point mentioned above, you can ask in the comment section.
Hello students! I hope you are doing great. Today, we are talking about the decoders in the proteus. We know that decoders are the building blocks of any digital electronic device. These electronic circuits are used for different purposes, such as memory addressing, signal demultiplexing, and control signal generation. These decoders have different types and we are discussing the 3 to 8 line decoders.
In this tutorial, we will start learning the basic concept of decoders. We’ll also understand what the 3-to-8line decoders are and how we connect this concept with the 74LS138 IC in proteus. We’ll discuss this IC in detail and use it in the project to present the detailed work.
Where To Buy? | ||||
---|---|---|---|---|
No. | Components | Distributor | Link To Buy | |
1 | 74LS138 | Amazon | Buy Now |
A three to eight line decoder is an electronic device that takes three inputs and based on their combination, provides one of its eight outputs. In simple words, the 3 to 8 line decoder gets three inputs and reads the binary combination of its input. As a result, the single output is obtained at the output of the decoder. Here are the basic concepts to understand its working:
A 3 to 8 line decoder has three input pins which are usually denoted as A, B and C. These correspond to the three bits of the binary code. The term binary means these can only be 0 or 1 and no other digits are allowed. This can be the raw bits from the user or can be the output signal from the circuits’ device that becomes the input of the decoder.
The 3 to 8 decoder has eight possible output pins. These are usually denoted as Y0, Y1, Y2,..., Y7 and the output is obtained only at one of these pins. The output depends on the binary combination of the input provided to it. In large circuits, its output is fed into any other component and the circuit works.
As mentioned before, the combination of the binary input decides the output. Only one of the eight output pins of the decoder gets high which means, only one output has the value of one and all others are zero. The high pin is considered active and all other pins are said to be inactive.
The truth talbe of all the inputs and possible output of 3 to 8 decoders are given here:
Input MSB (A) |
Input B |
Input LSB (C) |
Active Output |
Y0 |
Y1 |
Y2 |
Y3 |
Y4 |
Y5 |
Y6 |
Y7 |
0 |
0 |
0 |
Y0 |
1 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
1 |
Y1 |
0 |
1 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
1 |
0 |
Y2 |
0 |
0 |
1 |
0 |
0 |
0 |
0 |
0 |
0 |
1 |
1 |
Y3 |
0 |
0 |
0 |
1 |
0 |
0 |
0 |
0 |
1 |
0 |
0 |
Y4 |
0 |
0 |
0 |
0 |
1 |
0 |
0 |
0 |
1 |
0 |
1 |
Y5 |
0 |
0 |
0 |
0 |
0 |
1 |
0 |
0 |
1 |
1 |
0 |
Y6 |
0 |
0 |
0 |
0 |
0 |
0 |
1 |
0 |
1 |
1 |
1 |
Y7 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
1 |
Here,
MSB= Most significant bit
LSB= Least significant bit
I hope the above concepts are now clear with the help of this truth table.
The 74LS138 is a popular integrated circuit IC that is commonly used 3 to 8 line decoder. It is one of the members of 74LS therefore, it is named so. The 74LS is a group of transistor transistor logic (TTL) chips. The basic feature of this IC is to get three inputs and provide the signal on only one pin of the output automatically based on the binary inputs. In addition to the input, output, and functionality of the 74LS138, there are some additional features listed below:
The 74LS138 has the cascading feature which means, two or more 74LS138 can be connected together to enhance the number of output lines. The circuit is arranged in such a way that the output of one 74LS138 IC becomes the input of the other and as a result, more than one ICs can work together.
The structure of this IC is designed in such a way that it provides high-speed operation. It is done because the decoders are supposed to decode the input so quickly that its output may stimulate other functions of the circuits.
The TTL compatibility of the 74LS138 makes it more accurate. The LS in its name indicate that these are part of low-power shotkey series therefore, these can be operated at the 5V power supply. This makes it ideal for multiple electronic circuits and these do not require any additional device to get accurate power.
These ICs are versatile because they come in different packages and the users can have the right set of ICs depending on the circuit he is using. Two common packages of this IC are given next:
DIP (Dual Inline Package)
SOP (Small Outline Package)
It has multiple modes of operation therefore, it has versatile applications.
Before using any IC in the circuit, it is important to understand its pinouts. The 73LS138 has the 16 pins structure that which is shown here:
The detailed names and features of these pins can be matched with the table given below:
Pin Number |
Pin Name |
Pin Function |
1 |
A |
Address input pin |
2 |
B |
Address input pin |
3 |
C |
Address input pin |
4 |
G2A |
Active low enable pin |
5 |
G2B |
Active low enable pin |
6 |
G1 |
Active high enable pin |
7 |
Y7 |
Output pin |
8 |
GND |
Ground pin |
9 |
Y6 |
Output pin 6 |
10 |
Y5 |
Output pin 5 |
11 |
Y4 |
Output pin 4 |
12 |
Y3 |
Output pin 3 |
13 |
Y2 |
Output pin 2 |
14 |
Y1 |
Output pin 1 |
15 |
Y0 |
Output pin 0 |
16 |
VCC |
Power supply pin |
The structure and working of this IC can be understood by creating a project with it and for this, we have chosen the Porteus to show the detailed working. Here are the steps to create the project of a 3 to 8 line decoder in Proteus:
Open your Proteus software.
Create a new project.
Go to the pick library by clicking the “P” button at the left side of the screen. It will show you a search box with details of the components.
Here, type 74LS138 and you will see the following search:
Double click on the IC to collect it on your devices.
Selecting this IC, click on the working sheet to place it there.
You can see the pins and labels of this IC.
The 74LS138 requires some additional components to be used as a decoder. Here is the project where we are using it as 3 to 8 line decoder:
74LS138 IC
8 LEDs of different colors
Switch SPDT
Switch SPST
Switch Mom
Switch (simple)
Connecting wires
Go to the pick library and get all the components of the circuits one after the other.
Set the 74LS138 IC in the working area.
On the left side of the IC, arrange the switches to be used as the input devices.
On the left side of the IC, arrange the LEDs that will indicate the output.
Go toto the terminal mode from the left side of the screen and arrange the ground and power terminals with the required devices.
The circuit at this point must look like the following image:
Connect all of these with the help of connecting wires. For convenience, I am using the labels to have better work:
Once you have connected all the components, the circuit is ready to use. In the left bottom corner, search for the play button and run the project.
Change the input with the help of switches and check for the output LEDs. You will see the circuit works exactly according to the truth table.
The 74LS138 is designed to be used as a 3 to 8 line so there is no need to connect different ICs and components to design the working of this decoder.
The input and output pins are present with this IC therefore, the user simply connects the switches as an input device. A switch has only two possible states that are either on or off therefore, it is an ideal way to present the binary input.
Usually, LEDs are used as the output devices so that when they get the signal, they are turned on and vice versa.
The ground and power terminals are used to complete the circuit.
Pins 4, 5, and 6 are called the enabled pins. These are labeled as E1, E2, and E3 pins. Out of these, E1 and E2 are considered as the active low pins which means, these are active only when they are pulled down. On the other hand, the E3 is considered an active high; hence it activates the output only when it is pulled high.
Once the circuit is complete, the user can change the binary inputs through the switches and check for the output LEDs.
The combination of inputs results in the required output hence the user can easily design the circuit without making any technical changes.
Today, we have seen the details of 74LS138 decoder IC in Proteus. We started with the basic introduction of a decoder and saw what is the 3 to 8 line decoder isdecoder. After that, we saw the truth table and the features of a 3 to 8 line decoder. We saw how 74LS128 works and in the end, we designed the circuit of a 3 to 8 line decoder using 74LS138. The circuit was easy and we saw it working in detail. If you have any questions, you can ask in the comment section.
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Image Source: Pixabay
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Image Source: Pixabay
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Image Source: Pixabay
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