Signal edge detection in ladder logic, Rising edge logic, Signal edge types,, Rising edge in PLC ladder, Set output on a positive edge, Set output on a negative edge, Simulating edge detection, Simulating rising edge, Simulating falling edge, Simulating set output on the rising edge, Simulating set output on falling edge
Hello friends, How are you doing? Today, we have a very interesting topic of PLC ladder programming which is how to detect the transition between true and false and from low to high?. I know you are asking why do we need that? Well! Imagine my friends, we want to start a motor when the input signal state changes from high to low or from false to true. Let us give two examples to highlight the edge detection techniques. Good examples of using edge detection-based logic are timers and counters. In counters, they are energized to count up or down when a signal appears and the same for timers. Figure 1 shows the difference between using the edge to control a motor. In the top part, the motor is controlled by an input switch. the output is ON and OFF based on the status of the input. But, in the second example, the rising edge is used to energize a motor. So, the motor comes to true when the switch state changes from false to true. On the other hand, imagine my friends if you want to activate a protection relay or safety function based on the result of the logic operation (RLO) for output, in that case, we can control the running of the output for one scan cycle to be based on the change in the state of the RLO.

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Fig. 1: Rising edge logic

Signal Edge Types

There are two edge types:

  1. Falling edge.
  2. Rising edge.
Figure 2 shows the falling and rising edge signal. It shows the falling edge happens when the signal turned from true to false while the rising edge when it signals changes from false to true.

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Fig. 2: The falling and rising edge of a signal

Rising Edge in PLC Ladder Logic

Figure 3 shows the general symbol of a rising edge. The letter “P” denotes a positive edge. while fig. 4. Depicts the rising edge in ladder logic in the TIA portal of siemens software.

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Fig. 3: the general symbol of a positive or rising edge

In ladder programming, the rising edge shows a positive rising edge received for the signals. In fig. 4, the rising edge is for the signal tagged as “TagIn_4” and the previously saved value is stored in “Tag_M”. the system can recognize a rising edge by comparing the buffered value stored in “Tag_M” and the current value in “TagIn_4”. For example, if the previous value stored in “Tag_M” is False, and the current value in “TagIn_4” shows high logic, this would mean a rising edge is received.

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Fig. 4: the rising edge in a plc ladder program

Falling edge in PLC ladder

Figure 5 shows the general symbol of a falling edge. The letter “N” denotes a negative edge. while fig. 6. Depicts the falling edge in ladder logic in the TIA portal of siemens software.

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Fig. 5: the general symbol of a negative or falling edge

In ladder programming, the rising edge shows a negative or falling edge received for the signals. In fig. 6, the falling edge is for the signal tagged as “TagIn_4” and the previously saved value is stored in “Tag_M”. the system can recognize a falling edge by comparing the buffered value stored in “Tag_M” and the current value in “TagIn_4”. For example, if the previous value stored in “Tag_M” is True, and the current value in “TagIn_4” shows low or false logic, this would mean a falling edge is received.

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Fig. 6: the falling edge in a plc ladder program

Set Output on a Positive Edge

Now let’s do the same concept on the output side, fig. 7 shows the set output ladder instruction on a rising or positive edge. In this instruction, the result of the logic operation (RLO) which represents the left part before the output is evaluated to check the transition in its state. If the RLO changes from false to true then the output will be set for one scan cycle.

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Fig. 7: the set output on positive edge instruction

Figure 8 shows an example of the set output on a positive edge. On the most left, the coil with the letter “P” inside represents the instruction. The instruction works by saving the previous value of RLO into “Tag_M” and verifying the changes in a state with “TagOut”. For example, if the “Tag_M” holds a true state while the previously stored value in “Tag_M” was false. That would show a positive edge and the output will be set to true for the complete scan cycle.

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Fig. 8: example of set output on a rising edge

Set Output on a Negative Edge

Figure 9 shows the set output ladder instruction on a falling or negative edge. In this instruction, the result of the logic operation (RLO) which represents the left part before the output is evaluated to check the transition in its state. If the RLO changes from true to false then the output will be set for one scan cycle based on detecting a falling edge of RLO.

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Fig. 9: instruction of set output on falling edge

Figure 10 shows an example of the set output on a falling or negative edge. On the most left, the coil with the letter “N” inside represents the instruction. The instruction works by saving the previous value of RLO into “Tag_M” and verifying the changes in a state with “TagOut”. For example, if the “Tag_M” holds a false state while the previously stored value in “Tag_M” was true. That would show a negative or falling edge of the RLO. Consequently, the output will be set to true for the complete scan cycle.

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Fig. 10: example of set output instruction base don falling edge

Simulating edge detection

Now let’s go to our lab and open a simulator to enjoy practicing very critical points in ladder logic programming. Yes, my friends, these are very critical points and are used smartly in solving very hard problems to solve. But, by comprehensive these points, you will be superb in your field as a prospective ladder logic programmer. Two points we are going to simulate, the first one is the ringing and falling edge of the inputs and their effects on activating and energizing the output for a complete pulse. And the rising and falling edge cases of the result of logic output (RLO) and its effects on energizing the output for a complete pulse.

Simulating rising edge

Now, let’s assume we have a situation in the factory that, when specific action occurred, the output will be energized. In the example represented by fig. 11, when and only when input A, turned on, we need to start the output. That means the only scenario in which the output is turned on is when input A state changed from false to true. So let us simulate three scenarios, the first one shown in fig. 11, in this scenario the input previous status is saved in input B, while the current or new state is saved in input A. notice when the input does not change and it is false, the output is turned off.

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Fig. 11: the rising edge scenario 1

Now let’s turn on input A, so now input changed from false to true as shown in Fig. 12. Ohh, notice the output comes true and that’s the rising edge at when the input changes from false to true.

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Fig. 12: the rising edge scenario 2

And in the last scenario, when the input keeps true meaning the previous status was true and the current state is true, then the output is false as shown in Fig. 13.

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Fig. 13: the rising edge scenario 3

In a conclusion, in rising edge, the output only gets true when the input changed from false to true.

Falling Edge in PLC Simulator

Now, let’s assume we have another situation in the factory that, when an input or sensor turns off or changed from true to false, the output will be energized. In the example represented by fig. 14, when and only when input A, turned out from ON to off, the output will be energized. That means the only scenario in which the output is turned on is when input A state changed from true to false. So let us simulate three scenarios, the first one shown in fig. 14, in this scenario the input previous status is saved in input B, while the current or new state is saved in input A. notice when the input does not change and it is false, the output is turned off.

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Fig. 14: the falling edge scenario 1

Now let’s turn on input A, so now input changed from false to true as shown in Fig. 15. Ohh, notice the output is false because that’s not a falling edge as the input changes from false to true.

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Fig. 15: the falling edge scenario 2

And in the last scenario, when the input changed from true to false which is a falling edge. Therefore, the output turned on as in fig. 16.

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Fig. 16: the falling edge scenario 3

In a conclusion, in a falling edge, the output only gets true when the input changed from true to false.

Simulating set output on the rising edge

Now, my friends, we need to run the output for one pulse based on the result of logic output (RLO). Figure 17 shows the scenario of having a false state of the RLO, the output is false because there is no falling edge detected for the RLO.

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Fig. 17: set output on rising edge scenario 1

Figure 18 shows the case when the RLO is turned from false to true, the output comes true but for one pulse notice the previous status represented by buffer has become false but the output after pulse time returns to false. However, the pulse of the output has been detected thanks to energizing output tag_5.

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Fig. 18: set output on rising edge scenario 2

Simulating set output on falling edge

Figure 19 shows the very initial case of set output with a falling edge. To show, the case of the falling edge of RLO, we use another rung that would energize another output at Q0.6 when and only when the falling edge of the RLO occurs. In Fig. 19, the RLO was false. Therefore, there is no cause for a falling edge when RLO changed from true to false. So the output shows a false state.

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Fig. 19: set output on falling edge when RLO was initially false

Now let’s turn on the RLO, so the RLO changed from false to true which is still not a case of a falling edge of the RLO. SO the output is still false as shown in Fig. 20 represented by output Q0.6.

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Fig. 20: set output on falling edge when RLO turned to on

Figure .21 shows the scenario of the RLO turning from true to false which is a falling edge. In that case, the output will be turned on for one pulse and as a result, latching output at Q0.6 as shown in rung 2 of fig. 21.

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Fig. 21: set output on falling edge when the RLO turned back to false (falling edge)

What’s Next

Once more I would like to thank all my friends for continuing with our learning and practicing our PLC ladder logic series. Now we have learned the concept of edge detection, its importance, and how we can utilize the rising and following edge in some critical and accurate cases of logic. The rising and falling edge of the inputs can energize an output in a pulsative way or for only one pulse. This scenario exists in the industry and is very common. For example, when you want to energize a safety device by the occurrence of some conditions like increase of liquid level or temperature or pressure et cetera. Also, the result of logic output (RLO), can be used to set or reset output for one pulse. In the next tutorial, we are going to introduce the latching in more detail showing why we need to latch an output, the ways of latching with examples, and for sure enjoying our practicing with the PLC ladder logic simulator.